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[net-next,0/8] net: ipa: remaining IPA v5.0 support

Message ID 20230130210158.4126129-1-elder@linaro.org (mailing list archive)
Headers show
Series net: ipa: remaining IPA v5.0 support | expand

Message

Alex Elder Jan. 30, 2023, 9:01 p.m. UTC 
This series includes almost all remaining IPA code changes required
to support IPA v5.0.  IPA register definitions and configuration
data for IPA v5.0 will be sent later (soon).  Note that the GSI
register definitions still require work.  GSI for IPA v5.0 supports
up to 256 (rather than 32) channels, and this changes the way GSI
register offsets are calculated.  A few GSI register fields also
change.

The first patch in this series increases the number of IPA endpoints
supported by the driver, from 32 to 36.  The next updates the width
of the destination field for the IP_PACKET_INIT immediate command so
it can represent up to 256 endpoints rather than just 32.  The next
adds a few definitions of some IPA registers and fields that are
first available in IPA v5.0.

The next two patches update the code that handles router and filter
table caches.  Previously these were referred to as "hashed" tables,
and the IPv4 and IPv6 tables are now combined into one "unified"
table.  The sixth and seventh patches add support for a new pulse
generator, which allows time periods to be specified with a wider
range of clock resolution.  And the last patch just defines two new
memory regions that were not previously used.

					-Alex

Alex Elder (8):
  net: ipa: support more endpoints
  net: ipa: extend endpoints in packet init command
  net: ipa: define IPA v5.0+ registers
  net: ipa: update table cache flushing
  net: ipa: support zeroing new cache tables
  net: ipa: greater timer granularity options
  net: ipa: support a third pulse register
  net: ipa: define two new memory regions

 drivers/net/ipa/ipa_cmd.c      |  32 ++++++++---
 drivers/net/ipa/ipa_endpoint.c | 102 ++++++++++++++++++---------------
 drivers/net/ipa/ipa_endpoint.h |   4 +-
 drivers/net/ipa/ipa_main.c     |  14 ++++-
 drivers/net/ipa/ipa_mem.c      |   8 ++-
 drivers/net/ipa/ipa_mem.h      |   8 ++-
 drivers/net/ipa/ipa_reg.h      |  43 ++++++++++++--
 drivers/net/ipa/ipa_table.c    |  61 ++++++++++++++------
 8 files changed, 187 insertions(+), 85 deletions(-)

Comments

Leon Romanovsky Jan. 31, 2023, 11:40 a.m. UTC | #1 
On Mon, Jan 30, 2023 at 03:01:50PM -0600, Alex Elder wrote:
> This series includes almost all remaining IPA code changes required
> to support IPA v5.0.  IPA register definitions and configuration
> data for IPA v5.0 will be sent later (soon).  Note that the GSI
> register definitions still require work.  GSI for IPA v5.0 supports
> up to 256 (rather than 32) channels, and this changes the way GSI
> register offsets are calculated.  A few GSI register fields also
> change.
> 
> The first patch in this series increases the number of IPA endpoints
> supported by the driver, from 32 to 36.  The next updates the width
> of the destination field for the IP_PACKET_INIT immediate command so
> it can represent up to 256 endpoints rather than just 32.  The next
> adds a few definitions of some IPA registers and fields that are
> first available in IPA v5.0.
> 
> The next two patches update the code that handles router and filter
> table caches.  Previously these were referred to as "hashed" tables,
> and the IPv4 and IPv6 tables are now combined into one "unified"
> table.  The sixth and seventh patches add support for a new pulse
> generator, which allows time periods to be specified with a wider
> range of clock resolution.  And the last patch just defines two new
> memory regions that were not previously used.
> 
> 					-Alex
> 
> Alex Elder (8):
>   net: ipa: support more endpoints
>   net: ipa: extend endpoints in packet init command
>   net: ipa: define IPA v5.0+ registers
>   net: ipa: update table cache flushing
>   net: ipa: support zeroing new cache tables
>   net: ipa: greater timer granularity options
>   net: ipa: support a third pulse register
>   net: ipa: define two new memory regions
> 

Thanks,
Reviewed-by: Leon Romanovsky <leonro@nvidia.com>
patchwork-bot+netdevbpf@kernel.org Feb. 1, 2023, 5:50 a.m. UTC | #2 
Hello:

This series was applied to netdev/net-next.git (master)
by Jakub Kicinski <kuba@kernel.org>:

On Mon, 30 Jan 2023 15:01:50 -0600 you wrote:
> This series includes almost all remaining IPA code changes required
> to support IPA v5.0.  IPA register definitions and configuration
> data for IPA v5.0 will be sent later (soon).  Note that the GSI
> register definitions still require work.  GSI for IPA v5.0 supports
> up to 256 (rather than 32) channels, and this changes the way GSI
> register offsets are calculated.  A few GSI register fields also
> change.
> 
> [...]

Here is the summary with links:
  - [net-next,1/8] net: ipa: support more endpoints
    https://git.kernel.org/netdev/net-next/c/07abde549bc1
  - [net-next,2/8] net: ipa: extend endpoints in packet init command
    https://git.kernel.org/netdev/net-next/c/c84ddc119704
  - [net-next,3/8] net: ipa: define IPA v5.0+ registers
    https://git.kernel.org/netdev/net-next/c/8ba59716d16a
  - [net-next,4/8] net: ipa: update table cache flushing
    https://git.kernel.org/netdev/net-next/c/8e7c89d84a2b
  - [net-next,5/8] net: ipa: support zeroing new cache tables
    (no matching commit)
  - [net-next,6/8] net: ipa: greater timer granularity options
    https://git.kernel.org/netdev/net-next/c/32079a4ab106
  - [net-next,7/8] net: ipa: support a third pulse register
    (no matching commit)
  - [net-next,8/8] net: ipa: define two new memory regions
    https://git.kernel.org/netdev/net-next/c/5157d6bfcad3

You are awesome, thank you!