@@ -8,7 +8,7 @@ Required properties:
- dc-gpios: D/C pin
- reg: address of the panel on the SPI bus
-The node for this driver must be a child node of a SPI controller, hence
+The node for this driver must be a child node of an SPI controller, hence
all mandatory properties described in ../spi/spi-bus.txt must be specified.
Optional properties:
@@ -8,7 +8,7 @@ Required properties:
- rs-gpios: Register select signal
- reset-gpios: Reset pin
-The node for this driver must be a child node of a SPI controller, hence
+The node for this driver must be a child node of an SPI controller, hence
all mandatory properties described in ../spi/spi-bus.txt must be specified.
Optional properties:
@@ -3,7 +3,7 @@ Multi-Inno MI0283QT display panel
Required properties:
- compatible: "multi-inno,mi0283qt".
-The node for this driver must be a child node of a SPI controller, hence
+The node for this driver must be a child node of an SPI controller, hence
all mandatory properties described in ../spi/spi-bus.txt must be specified.
Optional properties:
@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: LG LG4573 TFT Liquid Crystal Display with SPI control bus
description: |
- The panel must obey the rules for a SPI slave device as specified in
+ The panel must obey the rules for an SPI slave device as specified in
spi/spi-controller.yaml
maintainers:
@@ -39,7 +39,7 @@ properties:
spi-cpol: true
spi-max-frequency:
- description: inherited as a SPI client node, the datasheet specifies
+ description: inherited as an SPI client node, the datasheet specifies
maximum 300 ns minimum cycle which gives around 3 MHz max frequency
maximum: 3000000
@@ -14,7 +14,7 @@ Required properties:
Required property for e2271cs021:
- border-gpios: Border control
-The node for this driver must be a child node of a SPI controller, hence
+The node for this driver must be a child node of an SPI controller, hence
all mandatory properties described in ../spi/spi-bus.txt must be specified.
Optional property:
@@ -6,7 +6,7 @@ Required properties:
the pin labeled D1 on the controller, not the pin labeled A0)
- reset-gpios: Reset pin
-The node for this driver must be a child node of a SPI controller, hence
+The node for this driver must be a child node of an SPI controller, hence
all mandatory properties described in ../spi/spi-bus.txt must be specified.
Optional properties:
@@ -43,7 +43,7 @@ examples:
#address-cells = <1>;
#size-cells = <0>;
- /* Example for a SPI device node */
+ /* Example for an SPI device node */
accelerometer@0 {
compatible = "adi,adis16240";
reg = <0>;
@@ -79,7 +79,7 @@ examples:
#address-cells = <1>;
#size-cells = <0>;
- /* Example for a SPI device node */
+ /* Example for an SPI device node */
accelerometer@0 {
compatible = "adi,adxl313";
reg = <0>;
@@ -68,7 +68,7 @@ examples:
#address-cells = <1>;
#size-cells = <0>;
- /* Example for a SPI device node */
+ /* Example for an SPI device node */
accelerometer@0 {
compatible = "adi,adxl345";
reg = <0>;
@@ -62,7 +62,7 @@ Optional properties for all bus drivers:
(used by self-test)
-Example for a SPI device node:
+Example for an SPI device node:
accelerometer@0 {
compatible = "st,lis302dl-spi";
@@ -69,7 +69,7 @@ examples:
#address-cells = <1>;
#size-cells = <0>;
- /* Example for a SPI device node */
+ /* Example for an SPI device node */
accelerometer@0 {
compatible = "nxp,fxls8962af";
reg = <0>;
@@ -10,7 +10,7 @@ maintainers:
- Oskar Andero <oskar.andero@gmail.com>
description: |
- Family of simple ADCs with a SPI interface.
+ Family of simple ADCs with an SPI interface.
properties:
compatible:
@@ -1,7 +1,7 @@
Device tree bindings for TI's ADS7843, ADS7845, ADS7846, ADS7873, TSC2046
SPI driven touch screen controllers.
-The node for this driver must be a child node of a SPI controller, hence
+The node for this driver must be a child node of an SPI controller, hence
all mandatory properties described in
Documentation/devicetree/bindings/spi/spi-bus.txt
@@ -3,7 +3,7 @@
The LP8860-Q1 is an high-efficiency LED
driver with boost controller. It has 4 high-precision
current sinks that can be controlled by a PWM input
-signal, a SPI/I2C master, or both.
+signal, an SPI/I2C master, or both.
Required properties:
- compatible :
@@ -11,7 +11,7 @@ maintainers:
- Fabrizio Castro <fabrizio.castro.jz@renesas.com>
description: |
- R-Car Gen3 DRIF is a SPI like receive only slave device. A general
+ R-Car Gen3 DRIF is an SPI like receive only slave device. A general
representation of DRIF interfacing with a master device is shown below.
+---------------------+ +---------------------+
@@ -10,7 +10,7 @@ maintainers:
- Sergei Shtylyov <sergei.shtylyov@gmail.com>
description: |
- Renesas RPC-IF allows a SPI flash or HyperFlash connected to the SoC to
+ Renesas RPC-IF allows an SPI flash or HyperFlash connected to the SoC to
be accessed via the external address space read mode or the manual mode.
The flash chip itself should be represented by a subnode of the RPC-IF node.
@@ -1,6 +1,6 @@
* Device tree bindings for Atmel Flexcom (Flexible Serial Communication Unit)
-The Atmel Flexcom is just a wrapper which embeds a SPI controller, an I2C
+The Atmel Flexcom is just a wrapper which embeds an SPI controller, an I2C
controller and an USART. Only one function can be used at a time and is chosen
at boot time according to the device tree.
@@ -8,7 +8,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: OLPC XO-1.75 Embedded Controller
description: |
- This binding describes the Embedded Controller acting as a SPI bus master
+ This binding describes the Embedded Controller acting as an SPI bus master
on a OLPC XO-1.75 laptop computer.
The embedded controller requires the SPI controller driver to signal
@@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/mmc/mmc-spi-slot.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
-title: MMC/SD/SDIO slot directly connected to a SPI bus
+title: MMC/SD/SDIO slot directly connected to an SPI bus
maintainers:
- Ulf Hansson <ulf.hansson@linaro.org>
@@ -14,7 +14,7 @@ Vitesse VSC7398 SparX-G8e 8-port Integrated Gigabit Ethernet Switch
This switch could have two different management interface.
If SPI interface is used, the device tree node is an SPI device so it must
-reside inside a SPI bus device tree node, see spi/spi-bus.txt
+reside inside an SPI bus device tree node, see spi/spi-bus.txt
When the chip is connected to a parallel memory bus and work in memory-mapped
I/O mode, a platform device is used to represent the vsc73xx. In this case it
@@ -2,7 +2,7 @@
This is a standalone 10 MBit ethernet controller with SPI interface.
-For each device connected to a SPI bus, define a child node within
+For each device connected to an SPI bus, define a child node within
the SPI master node.
Required properties:
@@ -2,7 +2,7 @@
This is a standalone 10/100 MBit Ethernet controller with SPI interface.
-For each device connected to a SPI bus, define a child node within
+For each device connected to an SPI bus, define a child node within
the SPI master node.
Required properties:
@@ -11,10 +11,10 @@ maintainers:
- Rafał Miłecki <rafal@milecki.pl>
description: |
- The Broadcom SPI controller is a SPI master found on various SOCs, including
+ The Broadcom SPI controller is an SPI master found on various SOCs, including
BRCMSTB (BCM7XXX), Cygnus, NSP and NS2. The Broadcom Master SPI hw IP consits
of:
- MSPI : SPI master controller can read and write to a SPI slave device
+ MSPI : SPI master controller can read and write to an SPI slave device
BSPI : Broadcom SPI in combination with the MSPI hw IP provides acceleration
for flash reads and be configured to do single, double, quad lane
io with 3-byte and 4-byte addressing support.
@@ -28,7 +28,7 @@ properties:
ready-gpios:
description: |
- GPIO used to signal a SPI master that the FIFO is filled and we're
+ GPIO used to signal an SPI master that the FIFO is filled and we're
ready to service a transfer. Only useful in slave mode.
maxItems: 1
@@ -40,7 +40,7 @@ properties:
nand-ecc-engine:
description: NAND ECC engine used by the SPI controller in order to perform
- on-the-fly correction when using a SPI-NAND memory.
+ on-the-fly correction when using an SPI-NAND memory.
$ref: /schemas/types.yaml#/definitions/phandle
required:
@@ -128,7 +128,7 @@ properties:
description: |
Default value of the rx-sample-delay-ns property.
This value will be used if the property is not explicitly defined
- for a SPI slave device.
+ for an SPI slave device.
SPI Rx sample delay offset, unit is nanoseconds.
The delay from the default sample time before the actual sample of the
@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: Generic SPI Multiplexer
description: |
- This binding describes a SPI bus multiplexer to route the SPI chip select
+ This binding describes an SPI bus multiplexer to route the SPI chip select
signals. This can be used when you need more devices than the SPI controller
has chip selects available. An example setup is shown in ASCII art; the actual
setting of the multiplexer to a channel needs to be done by a specific SPI mux
@@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/spi/spi-peripheral-props.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
-title: Peripheral-specific properties for a SPI bus.
+title: Peripheral-specific properties for an SPI bus.
description:
Many SPI controllers need to add properties to peripheral devices. They could
@@ -12,7 +12,7 @@ arbitrary streams of bytes, but rather are designed specifically for SPI NOR.
In particular, Freescale's QuadSPI controller must know the NOR commands to
find the right LUT sequence. Unfortunately, the SPI subsystem has no notion of
-opcodes, addresses, or data payloads; a SPI controller simply knows to send or
+opcodes, addresses, or data payloads; an SPI controller simply knows to send or
receive bytes (Tx and Rx). Therefore, we must define a new layering scheme under
which the controller driver is aware of the opcodes, addressing, and other
details of the SPI NOR protocol.
@@ -62,7 +62,7 @@ Part III - How can drivers use the framework?
The main API is spi_nor_scan(). Before you call the hook, a driver should
initialize the necessary fields for spi_nor{}. Please see
drivers/mtd/spi-nor/spi-nor.c for detail. Please also refer to spi-fsl-qspi.c
-when you want to write a new driver for a SPI NOR controller.
+when you want to write a new driver for an SPI NOR controller.
Another API is spi_nor_restore(), this is used to restore the status of SPI
flash chip such as addressing mode. Call it whenever detach the driver from
device or reboot the system.
@@ -187,7 +187,7 @@ Slave devices behind SPI bus have SpiSerialBus resource attached to them.
This is extracted automatically by the SPI core and the slave devices are
enumerated once spi_register_master() is called by the bus driver.
-Here is what the ACPI namespace for a SPI slave might look like::
+Here is what the ACPI namespace for an SPI slave might look like::
Device (EEP0)
{
@@ -86,7 +86,7 @@ reprograms them differently.
It is possible to leave holes in the array of GPIOs. This is useful in
cases like with SPI host controllers where some chip selects may be
-implemented as GPIOs and some as native signals. For example a SPI host
+implemented as GPIOs and some as native signals. For example an SPI host
controller can have chip selects 0 and 2 implemented as GPIOs and 1 as
native::
@@ -93,7 +93,7 @@ ring buffer cannot be invalidated, except when dropping all buffers.
The Compressed Data API does not make any assumptions on how the data
is transmitted to the audio DSP. DMA transfers from main memory to an
-embedded audio cluster or to a SPI interface for external DSPs are
+embedded audio cluster or to an SPI interface for external DSPs are
possible. As in the ALSA PCM case, a core set of routines is exposed;
each driver implementer will have to write support for a set of
mandatory routines and possibly make use of optional ones.
@@ -16,10 +16,10 @@ Description
This driver provides glue code connecting a National Semiconductor LM70 LLP
temperature sensor evaluation board to the kernel's SPI core subsystem.
-This is a SPI master controller driver. It can be used in conjunction with
+This is an SPI master controller driver. It can be used in conjunction with
(layered under) the LM70 logical driver (a "SPI protocol driver").
In effect, this driver turns the parallel port interface on the eval board
-into a SPI bus with a single device, which will be driven by the generic
+into an SPI bus with a single device, which will be driven by the generic
LM70 driver (drivers/hwmon/lm70.c).
@@ -66,12 +66,12 @@ To make the spidev driver bind to such a device, use the following:
echo spidev > /sys/bus/spi/devices/spiB.C/driver_override
echo spiB.C > /sys/bus/spi/drivers/spidev/bind
-When the spidev driver is bound to a SPI device, the sysfs node for the
+When the spidev driver is bound to an SPI device, the sysfs node for the
device will include a child device node with a "dev" attribute that will
be understood by udev or mdev (udev replacement from BusyBox; it's less
featureful, but often enough).
-For a SPI device with chipselect C on bus B, you should see:
+For an SPI device with chipselect C on bus B, you should see:
/dev/spidevB.C ...
character special device, major number 153 with
@@ -130,7 +130,7 @@ &ecspi4 {
* ST chip maximum SPI clock frequency is 33 MHz.
*
* TCG specification - Section 6.4.1 Clocking:
- * TPM shall support a SPI clock frequency range of 10-24 MHz.
+ * TPM shall support an SPI clock frequency range of 10-24 MHz.
*/
st33htph: tpm-tis@0 {
compatible = "st,st33htpm-spi", "tcg,tpm_tis-spi";
@@ -60,7 +60,7 @@ int __cvmx_helper_spi_enumerate(int interface)
}
/**
- * Probe a SPI interface and determine the number of ports
+ * Probe an SPI interface and determine the number of ports
* connected to it. The SPI interface should still be down after
* this call.
*
@@ -93,7 +93,7 @@ int __cvmx_helper_spi_probe(int interface)
}
/**
- * Bringup and enable a SPI interface. After this call packet I/O
+ * Bringup and enable an SPI interface. After this call packet I/O
* should be fully functional. This is called with IPD enabled but
* PKO disabled.
*
@@ -195,7 +195,7 @@ union cvmx_helper_link_info __cvmx_helper_spi_link_get(int ipd_port)
*/
int __cvmx_helper_spi_link_set(int ipd_port, union cvmx_helper_link_info link_info)
{
- /* Nothing to do. If we have a SPI4000 then the setup was already performed
+ /* Nothing to do. If we have an SPI4000 then the setup was already performed
by cvmx_spi4000_check_speed(). If not then there isn't any link
info */
return 0;
@@ -92,7 +92,7 @@ void cvmx_spi_set_callbacks(cvmx_spi_callbacks_t *new_callbacks)
* Initialize and start the SPI interface.
*
* @interface: The identifier of the packet interface to configure and
- * use as a SPI interface.
+ * use as an SPI interface.
* @mode: The operating mode for the SPI interface. The interface
* can operate as a full duplex (both Tx and Rx data paths
* active) or as a halfplex (either the Tx data path is
@@ -138,7 +138,7 @@ int cvmx_spi_start_interface(int interface, cvmx_spi_mode_t mode, int timeout,
* with its correspondent system.
*
* @interface: The identifier of the packet interface to configure and
- * use as a SPI interface.
+ * use as an SPI interface.
* @mode: The operating mode for the SPI interface. The interface
* can operate as a full duplex (both Tx and Rx data paths
* active) or as a halfplex (either the Tx data path is
@@ -183,7 +183,7 @@ EXPORT_SYMBOL_GPL(cvmx_spi_restart_interface);
* Callback to perform SPI4 reset
*
* @interface: The identifier of the packet interface to configure and
- * use as a SPI interface.
+ * use as an SPI interface.
* @mode: The operating mode for the SPI interface. The interface
* can operate as a full duplex (both Tx and Rx data paths
* active) or as a halfplex (either the Tx data path is
@@ -298,7 +298,7 @@ int cvmx_spi_reset_cb(int interface, cvmx_spi_mode_t mode)
* Callback to setup calendar and miscellaneous settings before clock detection
*
* @interface: The identifier of the packet interface to configure and
- * use as a SPI interface.
+ * use as an SPI interface.
* @mode: The operating mode for the SPI interface. The interface
* can operate as a full duplex (both Tx and Rx data paths
* active) or as a halfplex (either the Tx data path is
@@ -417,7 +417,7 @@ int cvmx_spi_calendar_setup_cb(int interface, cvmx_spi_mode_t mode,
* Callback to perform clock detection
*
* @interface: The identifier of the packet interface to configure and
- * use as a SPI interface.
+ * use as an SPI interface.
* @mode: The operating mode for the SPI interface. The interface
* can operate as a full duplex (both Tx and Rx data paths
* active) or as a halfplex (either the Tx data path is
@@ -495,7 +495,7 @@ int cvmx_spi_clock_detect_cb(int interface, cvmx_spi_mode_t mode, int timeout)
* Callback to perform link training
*
* @interface: The identifier of the packet interface to configure and
- * use as a SPI interface.
+ * use as an SPI interface.
* @mode: The operating mode for the SPI interface. The interface
* can operate as a full duplex (both Tx and Rx data paths
* active) or as a halfplex (either the Tx data path is
@@ -564,7 +564,7 @@ int cvmx_spi_training_cb(int interface, cvmx_spi_mode_t mode, int timeout)
* Callback to perform calendar data synchronization
*
* @interface: The identifier of the packet interface to configure and
- * use as a SPI interface.
+ * use as an SPI interface.
* @mode: The operating mode for the SPI interface. The interface
* can operate as a full duplex (both Tx and Rx data paths
* active) or as a halfplex (either the Tx data path is
@@ -621,7 +621,7 @@ int cvmx_spi_calendar_sync_cb(int interface, cvmx_spi_mode_t mode, int timeout)
* Callback to handle interface up
*
* @interface: The identifier of the packet interface to configure and
- * use as a SPI interface.
+ * use as an SPI interface.
* @mode: The operating mode for the SPI interface. The interface
* can operate as a full duplex (both Tx and Rx data paths
* active) or as a halfplex (either the Tx data path is
@@ -33,7 +33,7 @@
#define __CVMX_HELPER_SPI_H__
/**
- * Probe a SPI interface and determine the number of ports
+ * Probe an SPI interface and determine the number of ports
* connected to it. The SPI interface should still be down after
* this call.
*
@@ -45,7 +45,7 @@ extern int __cvmx_helper_spi_probe(int interface);
extern int __cvmx_helper_spi_enumerate(int interface);
/**
- * Bringup and enable a SPI interface. After this call packet I/O
+ * Bringup and enable an SPI interface. After this call packet I/O
* should be fully functional. This is called with IPD enabled but
* PKO disabled.
*
@@ -84,7 +84,7 @@ static inline int cvmx_spi_is_spi_interface(int interface)
* Initialize and start the SPI interface.
*
* @interface: The identifier of the packet interface to configure and
- * use as a SPI interface.
+ * use as an SPI interface.
* @mode: The operating mode for the SPI interface. The interface
* can operate as a full duplex (both Tx and Rx data paths
* active) or as a halfplex (either the Tx data path is
@@ -102,7 +102,7 @@ extern int cvmx_spi_start_interface(int interface, cvmx_spi_mode_t mode,
* with its corespondant system.
*
* @interface: The identifier of the packet interface to configure and
- * use as a SPI interface.
+ * use as an SPI interface.
* @mode: The operating mode for the SPI interface. The interface
* can operate as a full duplex (both Tx and Rx data paths
* active) or as a halfplex (either the Tx data path is
@@ -114,7 +114,7 @@ extern int cvmx_spi_restart_interface(int interface, cvmx_spi_mode_t mode,
int timeout);
/**
- * Return non-zero if the SPI interface has a SPI4000 attached
+ * Return non-zero if the SPI interface has an SPI4000 attached
*
* @interface: SPI interface the SPI4000 is connected to
*
@@ -171,7 +171,7 @@ extern void cvmx_spi_set_callbacks(cvmx_spi_callbacks_t *new_callbacks);
* Callback to perform SPI4 reset
*
* @interface: The identifier of the packet interface to configure and
- * use as a SPI interface.
+ * use as an SPI interface.
* @mode: The operating mode for the SPI interface. The interface
* can operate as a full duplex (both Tx and Rx data paths
* active) or as a halfplex (either the Tx data path is
@@ -187,7 +187,7 @@ extern int cvmx_spi_reset_cb(int interface, cvmx_spi_mode_t mode);
* detection
*
* @interface: The identifier of the packet interface to configure and
- * use as a SPI interface.
+ * use as an SPI interface.
* @mode: The operating mode for the SPI interface. The interface
* can operate as a full duplex (both Tx and Rx data paths
* active) or as a halfplex (either the Tx data path is
@@ -204,7 +204,7 @@ extern int cvmx_spi_calendar_setup_cb(int interface, cvmx_spi_mode_t mode,
* Callback to perform clock detection
*
* @interface: The identifier of the packet interface to configure and
- * use as a SPI interface.
+ * use as an SPI interface.
* @mode: The operating mode for the SPI interface. The interface
* can operate as a full duplex (both Tx and Rx data paths
* active) or as a halfplex (either the Tx data path is
@@ -221,7 +221,7 @@ extern int cvmx_spi_clock_detect_cb(int interface, cvmx_spi_mode_t mode,
* Callback to perform link training
*
* @interface: The identifier of the packet interface to configure and
- * use as a SPI interface.
+ * use as an SPI interface.
* @mode: The operating mode for the SPI interface. The interface
* can operate as a full duplex (both Tx and Rx data paths
* active) or as a halfplex (either the Tx data path is
@@ -238,7 +238,7 @@ extern int cvmx_spi_training_cb(int interface, cvmx_spi_mode_t mode,
* Callback to perform calendar data synchronization
*
* @interface: The identifier of the packet interface to configure and
- * use as a SPI interface.
+ * use as an SPI interface.
* @mode: The operating mode for the SPI interface. The interface
* can operate as a full duplex (both Tx and Rx data paths
* active) or as a halfplex (either the Tx data path is
@@ -255,7 +255,7 @@ extern int cvmx_spi_calendar_sync_cb(int interface, cvmx_spi_mode_t mode,
* Callback to handle interface up
*
* @interface: The identifier of the packet interface to configure and
- * use as a SPI interface.
+ * use as an SPI interface.
* @mode: The operating mode for the SPI interface. The interface
* can operate as a full duplex (both Tx and Rx data paths
* active) or as a halfplex (either the Tx data path is
@@ -359,7 +359,7 @@ typedef union {
* RGMII packet had a studder error (data not
* repeated - 10/100M only) or the SPI4 packet
* was sent to an NXA.
- * - 16 = FCS error: a SPI4.2 packet had an FCS error.
+ * - 16 = FCS error: an SPI4.2 packet had an FCS error.
* - 17 = Skip error: a packet was not large enough to
* cover the skipped bytes.
* - 18 = L2 header malformed: the packet is not long
@@ -1,7 +1,7 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Console driver for LCD2S 4x20 character displays connected through i2c.
- * The display also has a SPI interface, but the driver does not support
+ * The display also has an SPI interface, but the driver does not support
* this yet.
*
* This is a driver allowing you to use a LCD2S 4x20 from Modtronix
@@ -138,7 +138,7 @@ MODULE_DEVICE_TABLE(of, ssd130x_of_match);
* if the device was registered via OF. This means that the module will not be
* auto loaded, unless it contains an alias that matches the MODALIAS reported.
*
- * To workaround this issue, add a SPI device ID table. Even when this should
+ * To workaround this issue, add an SPI device ID table. Even when this should
* not be needed for this driver to match the registered SPI devices.
*/
static const struct spi_device_id ssd130x_spi_table[] = {
@@ -35,7 +35,7 @@
#define ILI9486_MADCTL_MY BIT(7)
/*
- * The PiScreen/waveshare rpi-lcd-35 has a SPI to 16-bit parallel bus converter
+ * The PiScreen/waveshare rpi-lcd-35 has an SPI to 16-bit parallel bus converter
* in front of the display controller. This means that 8-bit values have to be
* transferred as 16-bit.
*/
@@ -68,7 +68,7 @@ config INPUT_AD714X_SPI
depends on INPUT_AD714X && SPI
default y
help
- Say Y here if you have AD7142/AD7147 hooked to a SPI bus.
+ Say Y here if you have AD7142/AD7147 hooked to an SPI bus.
To compile this driver as a module, choose M here: the
module will be called ad714x-spi.
@@ -724,7 +724,7 @@ config INPUT_ADXL34X_SPI
depends on INPUT_ADXL34X && SPI
default y
help
- Say Y here if you have ADXL345/6 hooked to a SPI bus.
+ Say Y here if you have ADXL345/6 hooked to an SPI bus.
To compile this driver as a module, choose M here: the
module will be called adxl34x-spi.
@@ -26,7 +26,7 @@ config RMI4_SPI
tristate "RMI4 SPI Support"
depends on SPI
help
- Say Y here if you want to support RMI4 devices connected to a SPI
+ Say Y here if you want to support RMI4 devices connected to an SPI
bus.
If unsure, say N.
@@ -82,7 +82,7 @@ config TOUCHSCREEN_AD7879_SPI
depends on TOUCHSCREEN_AD7879 && SPI_MASTER
select REGMAP_SPI
help
- Say Y here if you have AD7879-1/AD7889-1 hooked to a SPI bus.
+ Say Y here if you have AD7879-1/AD7889-1 hooked to an SPI bus.
If unsure, say N (but it's safe to say "Y").
@@ -138,7 +138,7 @@ config MFD_ATMEL_FLEXCOM
depends on OF
help
Select this to get support for Atmel Flexcom. This is a wrapper
- which embeds a SPI controller, a I2C controller and a USART. Only
+ which embeds an SPI controller, a I2C controller and a USART. Only
one function can be used at a time. The choice is done at boot time
by the probe function of this MFD driver according to a device tree
property.
@@ -21,7 +21,7 @@ struct resource;
* initialization based on bus speed.
* @dummy_buf: Zero-filled buffer of spi_padding_bytes size. The dummy
* bytes that will be sent out between the address and
- * data of a SPI read operation.
+ * data of an SPI read operation.
*/
struct ocelot_ddata {
struct regmap *gcb_regmap;
@@ -632,7 +632,7 @@ config MMC_SPI
select CRC7
select CRC_ITU_T
help
- Some systems access MMC/SD/SDIO cards using a SPI controller
+ Some systems access MMC/SD/SDIO cards using an SPI controller
instead of using a "native" MMC/SD/SDIO controller. This has a
disadvantage of being relatively high overhead, but a compensating
advantage of working on many systems without dedicated MMC/SD/SDIO
@@ -14,5 +14,5 @@ config SPI_NXP_SPIFI
Enable support for the NXP LPC SPI Flash Interface controller.
SPIFI is a specialized controller for connecting serial SPI
- Flash. Enable this option if you have a device with a SPIFI
+ Flash. Enable this option if you have a device with an SPIFI
controller and want to access the Flash as a mtd device.
@@ -1138,7 +1138,7 @@ int spi_nor_erase_sector(struct spi_nor *nor, u32 addr)
/**
* spi_nor_div_by_erase_size() - calculate remainder and update new dividend
- * @erase: pointer to a structure that describes a SPI NOR erase type
+ * @erase: pointer to a structure that describes an SPI NOR erase type
* @dividend: dividend value
* @remainder: pointer to u32 remainder (will be updated)
*
@@ -1159,7 +1159,7 @@ static u64 spi_nor_div_by_erase_size(const struct spi_nor_erase_type *erase,
* which the address fits is expected to be
* provided.
* @map: the erase map of the SPI NOR
- * @region: pointer to a structure that describes a SPI NOR erase region
+ * @region: pointer to a structure that describes an SPI NOR erase region
* @addr: offset in the serial flash memory
* @len: number of bytes to erase
*
@@ -1217,7 +1217,7 @@ static u64 spi_nor_region_end(const struct spi_nor_erase_region *region)
/**
* spi_nor_region_next() - get the next spi nor region
- * @region: pointer to a structure that describes a SPI NOR erase region
+ * @region: pointer to a structure that describes an SPI NOR erase region
*
* Return: the next spi nor region or NULL if last region.
*/
@@ -1260,8 +1260,8 @@ spi_nor_find_erase_region(const struct spi_nor_erase_map *map, u64 addr)
/**
* spi_nor_init_erase_cmd() - initialize an erase command
- * @region: pointer to a structure that describes a SPI NOR erase region
- * @erase: pointer to a structure that describes a SPI NOR erase type
+ * @region: pointer to a structure that describes an SPI NOR erase region
+ * @erase: pointer to a structure that describes an SPI NOR erase type
*
* Return: the pointer to the allocated erase command, ERR_PTR(-errno)
* otherwise.
@@ -2011,8 +2011,8 @@ spi_nor_spimem_adjust_hwcaps(struct spi_nor *nor, u32 *hwcaps)
}
/**
- * spi_nor_set_erase_type() - set a SPI NOR erase type
- * @erase: pointer to a structure that describes a SPI NOR erase type
+ * spi_nor_set_erase_type() - set an SPI NOR erase type
+ * @erase: pointer to a structure that describes an SPI NOR erase type
* @size: the size of the sector/block erased by the erase type
* @opcode: the SPI command op code to erase the sector/block
*/
@@ -189,7 +189,7 @@ enum spi_nor_pp_command_index {
};
/**
- * struct spi_nor_erase_type - Structure to describe a SPI NOR erase type
+ * struct spi_nor_erase_type - Structure to describe an SPI NOR erase type
* @size: the size of the sector/block erased by the erase type.
* JEDEC JESD216B imposes erase sizes to be a power of 2.
* @size_shift: @size is a power of 2, the shift is stored in
@@ -228,7 +228,7 @@ struct spi_nor_erase_command {
};
/**
- * struct spi_nor_erase_region - Structure to describe a SPI NOR erase region
+ * struct spi_nor_erase_region - Structure to describe an SPI NOR erase region
* @offset: the offset in the data array of erase region start.
* LSB bits are used as a bitmask encoding flags to
* determine if this region is overlaid, if this region is
@@ -304,7 +304,7 @@ static const struct sfdp_bfpt_erase sfdp_bfpt_erases[] = {
/**
* spi_nor_set_erase_settings_from_bfpt() - set erase type settings from BFPT
- * @erase: pointer to a structure that describes a SPI NOR erase type
+ * @erase: pointer to a structure that describes an SPI NOR erase type
* @size: the size of the sector/block erased by the erase type
* @opcode: the SPI command op code to erase the sector/block
* @i: erase type index as sorted in the Basic Flash Parameter Table
@@ -775,8 +775,8 @@ static void spi_nor_region_mark_overlay(struct spi_nor_erase_region *region)
/**
* spi_nor_region_check_overlay() - set overlay bit when the region is overlaid
- * @region: pointer to a structure that describes a SPI NOR erase region
- * @erase: pointer to a structure that describes a SPI NOR erase type
+ * @region: pointer to a structure that describes an SPI NOR erase region
+ * @erase: pointer to a structure that describes an SPI NOR erase type
* @erase_type: erase type bitmask
*/
static void
@@ -71,11 +71,11 @@
* (the switch will read the fields provided in the buffer).
* OP_DEL: Set if the manual says the VALIDENT bit is supported in the
* COMMAND portion of this dynamic config buffer (i.e. the
- * specified entry can be invalidated through a SPI write
+ * specified entry can be invalidated through an SPI write
* command).
* OP_SEARCH: Set if the manual says that the index of an entry can
* be retrieved in the COMMAND portion of the buffer based
- * on its ENTRY portion, as a result of a SPI write command.
+ * on its ENTRY portion, as a result of an SPI write command.
* Only the TCAM-based FDB table on SJA1105 P/Q/R/S supports
* this.
* OP_VALID_ANYWAY: Reading some tables through the dynamic config
@@ -346,7 +346,7 @@ static void locked_regw_write(struct enc28j60_net *priv, u8 address, u16 data)
/*
* Buffer memory read
- * Select the starting address and execute a SPI buffer read.
+ * Select the starting address and execute an SPI buffer read.
*/
static void enc28j60_mem_read(struct enc28j60_net *priv, u16 addr, int len,
u8 *data)
@@ -31,7 +31,7 @@ config WILC1000_SPI
help
This module adds support for the SPI interface of adapters using
WILC1000 chipset. The Atmel WILC1000 has a Serial Peripheral
- Interface (SPI) that operates as a SPI slave. This SPI interface can
+ Interface (SPI) that operates as an SPI slave. This SPI interface can
be used for control and for serial I/O of 802.11 data. The SPI is a
full-duplex slave synchronous serial interface that is available
immediately following reset when pin 9 (SDIO_SPI_CFG) is tied to
@@ -24,7 +24,7 @@ config CW1200_WLAN_SPI
tristate "Support SPI platforms"
depends on CW1200 && SPI
help
- Enables support for the CW1200 connected via a SPI bus. You will
+ Enables support for the CW1200 connected via an SPI bus. You will
need to add appropriate platform data glue in your board setup
file.
@@ -115,7 +115,7 @@ config CROS_EC_SPI
help
If you say Y here, you get support for talking to the ChromeOS EC
- through a SPI bus, using a byte-level protocol. Since the EC's
+ through an SPI bus, using a byte-level protocol. Since the EC's
response time cannot be guaranteed, we support ignoring
'pre-amble' bytes before the response actually starts.
@@ -61,7 +61,7 @@
#define EC_SPI_RECOVERY_TIME_NS (200 * 1000)
/**
- * struct cros_ec_spi - information about a SPI-connected EC
+ * struct cros_ec_spi - information about an SPI-connected EC
*
* @spi: SPI device we are connected to
* @last_transfer_ns: time that we last finished a transfer.
@@ -701,7 +701,7 @@ static int ds1305_probe(struct spi_device *spi)
/* Maybe set up alarm IRQ; be ready to handle it triggering right
* away. NOTE that we don't share this. The signal is active low,
- * and we can't ack it before a SPI message delay. We temporarily
+ * and we can't ack it before an SPI message delay. We temporarily
* disable the IRQ until it's acked, which lets us work with more
* IRQ trigger modes (not all IRQ controllers can do falling edge).
*/
@@ -77,7 +77,7 @@ config SPI_ALTERA_DFL
help
This is a Device Feature List (DFL) bus driver for the
Altera SPI master controller. The SPI master is connected
- to a SPI slave to Avalon bridge in a Intel MAX BMC.
+ to an SPI slave to Avalon bridge in a Intel MAX BMC.
config SPI_AR934X
tristate "Qualcomm Atheros AR934X/QCA95XX SPI controller driver"
@@ -632,7 +632,7 @@ config SPI_MTK_SNFI
help
This enables support for SPI-NAND mode on the MediaTek NAND
Flash Interface found on MediaTek ARM SoCs. This controller
- is implemented as a SPI-MEM controller with pipelined ECC
+ is implemented as an SPI-MEM controller with pipelined ECC
capcability.
config SPI_WPCM_FIU
@@ -765,7 +765,7 @@ config SPI_PXA2XX
depends on ARCH_PXA || ARCH_MMP || PCI || ACPI || COMPILE_TEST
select PXA_SSP if ARCH_PXA || ARCH_MMP
help
- This enables using a PXA2xx or Sodaville SSP port as a SPI master
+ This enables using a PXA2xx or Sodaville SSP port as an SPI master
controller. The driver can be configured to use any SSP port and
additional documentation can be found a Documentation/spi/pxa2xx.rst.
@@ -1151,7 +1151,7 @@ config SPI_MUX
select MULTIPLEXER
help
This adds support for SPI multiplexers. Each SPI mux will be
- accessible as a SPI controller, the devices behind the mux will appear
+ accessible as an SPI controller, the devices behind the mux will appear
to be chip selects on this controller. It is still necessary to
select one or more specific mux-controller drivers.
@@ -438,7 +438,7 @@ const char *spi_mem_get_name(struct spi_mem *mem)
EXPORT_SYMBOL_GPL(spi_mem_get_name);
/**
- * spi_mem_adjust_op_size() - Adjust the data size of a SPI mem operation to
+ * spi_mem_adjust_op_size() - Adjust the data size of an SPI mem operation to
* match controller limitations
* @mem: the SPI memory
* @op: the operation to adjust
@@ -886,11 +886,11 @@ static void spi_mem_shutdown(struct spi_device *spi)
}
/**
- * spi_mem_driver_register_with_owner() - Register a SPI memory driver
+ * spi_mem_driver_register_with_owner() - Register an SPI memory driver
* @memdrv: the SPI memory driver to register
* @owner: the owner of this driver
*
- * Registers a SPI memory driver.
+ * Registers an SPI memory driver.
*
* Return: 0 in case of success, a negative error core otherwise.
*/
@@ -907,10 +907,10 @@ int spi_mem_driver_register_with_owner(struct spi_mem_driver *memdrv,
EXPORT_SYMBOL_GPL(spi_mem_driver_register_with_owner);
/**
- * spi_mem_driver_unregister() - Unregister a SPI memory driver
+ * spi_mem_driver_unregister() - Unregister an SPI memory driver
* @memdrv: the SPI memory driver to unregister
*
- * Unregisters a SPI memory driver.
+ * Unregisters an SPI memory driver.
*/
void spi_mem_driver_unregister(struct spi_mem_driver *memdrv)
{
@@ -285,7 +285,7 @@ static int mpc52xx_psc_spi_port_config(int psc_id, struct mpc52xx_psc_spi *mps)
out_8(&fifo->rfcntl, 0);
out_8(&psc->mode, MPC52xx_PSC_MODE_FFULL);
- /* Configure 8bit codec mode as a SPI master and use EOF flags */
+ /* Configure 8bit codec mode as an SPI master and use EOF flags */
/* SICR_SIM_CODEC8|SICR_GENCLK|SICR_SPI|SICR_MSTR|SICR_USEEOF */
out_be32(&psc->sicr, 0x0180C800);
out_be16((u16 __iomem *)&psc->ccr, 0x070F); /* default SPI Clk 1MHz */
@@ -470,7 +470,7 @@ struct bus_type spi_bus_type = {
EXPORT_SYMBOL_GPL(spi_bus_type);
/**
- * __spi_register_driver - register a SPI driver
+ * __spi_register_driver - register an SPI driver
* @owner: owner module of the driver to register
* @sdrv: the driver to register
* Context: can sleep
@@ -3241,7 +3241,7 @@ static void devm_spi_unregister(struct device *dev, void *res)
* spi_alloc_slave()
* Context: can sleep
*
- * Register a SPI device as with spi_register_controller() which will
+ * Register an SPI device as with spi_register_controller() which will
* automatically be unregistered and freed.
*
* Return: zero on success, else a negative error code.
@@ -152,7 +152,7 @@ struct fbtft_platform_data {
* supported by kernel-doc.
*
*/
-/* @spi: Set if it is a SPI device
+/* @spi: Set if it is an SPI device
* @pdev: Set if it is a platform device
* @info: Pointer to framebuffer fb_info structure
* @pdata: Pointer to platform data
@@ -29,7 +29,7 @@ config ADE7854_SPI
depends on ADE7854 && SPI
default y
help
- Say Y here if you have ADE7854/58/68/78 hooked to a SPI bus.
+ Say Y here if you have ADE7854/58/68/78 hooked to an SPI bus.
To compile this driver as a module, choose M here: the
module will be called ade7854-spi.
@@ -175,7 +175,7 @@ static void cvm_oct_spi_poll(struct net_device *dev)
if (priv->port == spi4000_port) {
/*
* This function does nothing if it is called on an
- * interface without a SPI4000.
+ * interface without an SPI4000.
*/
cvmx_spi4000_check_speed(interface, priv->port);
/*
@@ -7,7 +7,7 @@
* (C) Copyright 2014 David Mosberger-Tang <davidm@egauge.net>
*
* MAX3421 is a chip implementing a USB 2.0 Full-/Low-Speed host
- * controller on a SPI bus.
+ * controller on an SPI bus.
*
* Based on:
* o MAX3421E datasheet
@@ -231,8 +231,8 @@ struct spinand_devid {
/**
* struct manufacurer_ops - SPI NAND manufacturer specific operations
- * @init: initialize a SPI NAND device
- * @cleanup: cleanup a SPI NAND device
+ * @init: initialize an SPI NAND device
+ * @cleanup: cleanup an SPI NAND device
*
* Each SPI NAND manufacturer driver should implement this interface so that
* NAND chips coming from this vendor can be initialized properly.
@@ -293,7 +293,7 @@ struct spinand_op_variants {
}
/**
- * spinand_ecc_info - description of the on-die ECC implemented by a SPI NAND
+ * spinand_ecc_info - description of the on-die ECC implemented by an SPI NAND
* chip
* @get_status: get the ECC status. Should return a positive number encoding
* the number of corrected bitflips if correction was possible or
@@ -462,7 +462,7 @@ static inline struct spinand_device *mtd_to_spinand(struct mtd_info *mtd)
}
/**
- * spinand_to_mtd() - Get the MTD device embedded in a SPI NAND device
+ * spinand_to_mtd() - Get the MTD device embedded in an SPI NAND device
* @spinand: SPI NAND device
*
* Return: the MTD device embedded in @spinand.
@@ -484,7 +484,7 @@ static inline struct spinand_device *nand_to_spinand(struct nand_device *nand)
}
/**
- * spinand_to_nand() - Get the NAND device embedded in a SPI NAND object
+ * spinand_to_nand() - Get the NAND device embedded in an SPI NAND object
* @spinand: SPI NAND device
*
* Return: the NAND device embedded in @spinand.
@@ -496,11 +496,11 @@ spinand_to_nand(struct spinand_device *spinand)
}
/**
- * spinand_set_of_node - Attach a DT node to a SPI NAND device
+ * spinand_set_of_node - Attach a DT node to an SPI NAND device
* @spinand: SPI NAND device
* @np: DT node
*
- * Attach a DT node to a SPI NAND device.
+ * Attach a DT node to an SPI NAND device.
*/
static inline void spinand_set_of_node(struct spinand_device *spinand,
struct device_node *np)
@@ -173,7 +173,7 @@ struct rmi_f01_power_management {
* SPI mode.
* @split_read_byte_delay_us - the delay between each byte of a read operation
* in V2 mode.
- * @pre_delay_us - the delay before the start of a SPI transaction. This is
+ * @pre_delay_us - the delay before the start of an SPI transaction. This is
* typically useful in conjunction with custom chip select assertions (see
* below).
* @post_delay_us - the delay after the completion of an SPI transaction. This
@@ -56,7 +56,7 @@
#define SPI_MEM_OP_NO_DATA { }
/**
- * enum spi_mem_data_dir - describes the direction of a SPI memory data
+ * enum spi_mem_data_dir - describes the direction of an SPI memory data
* transfer from the controller perspective
* @SPI_MEM_NO_DATA: no data transferred
* @SPI_MEM_DATA_IN: data coming from the SPI memory
@@ -69,7 +69,7 @@ enum spi_mem_data_dir {
};
/**
- * struct spi_mem_op - describes a SPI memory operation
+ * struct spi_mem_op - describes an SPI memory operation
* @cmd.nbytes: number of opcode bytes (only 1 or 2 are valid). The opcode is
* sent MSB-first.
* @cmd.buswidth: number of IO lines used to transmit the command
@@ -182,7 +182,7 @@ struct spi_mem_dirmap_desc {
};
/**
- * struct spi_mem - describes a SPI memory device
+ * struct spi_mem - describes an SPI memory device
* @spi: the underlying SPI device
* @drvpriv: spi_mem_driver private data
* @name: name of the SPI memory device
@@ -200,7 +200,7 @@ struct spi_mem {
};
/**
- * struct spi_mem_set_drvdata() - attach driver private data to a SPI mem
+ * struct spi_mem_set_drvdata() - attach driver private data to an SPI mem
* device
* @mem: memory device
* @data: data to attach to the memory device
@@ -211,7 +211,7 @@ static inline void spi_mem_set_drvdata(struct spi_mem *mem, void *data)
}
/**
- * struct spi_mem_get_drvdata() - get driver private data attached to a SPI mem
+ * struct spi_mem_get_drvdata() - get driver private data attached to an SPI mem
* device
* @mem: memory device
*
@@ -228,7 +228,7 @@ static inline void *spi_mem_get_drvdata(struct spi_mem *mem)
* limitations (can be alignment or max RX/TX size
* limitations)
* @supports_op: check if an operation is supported by the controller
- * @exec_op: execute a SPI memory operation
+ * @exec_op: execute an SPI memory operation
* @get_name: get a custom name for the SPI mem device from the controller.
* This might be needed if the controller driver has been ported
* to use the SPI mem layer and a custom name is used to keep
@@ -302,10 +302,10 @@ struct spi_controller_mem_caps {
/**
* struct spi_mem_driver - SPI memory driver
- * @spidrv: inherit from a SPI driver
- * @probe: probe a SPI memory. Usually where detection/initialization takes
+ * @spidrv: inherit from an SPI driver
+ * @probe: probe an SPI memory. Usually where detection/initialization takes
* place
- * @remove: remove a SPI memory
+ * @remove: remove an SPI memory
* @shutdown: take appropriate action when the system is shutdown
*
* This is just a thin wrapper around a spi_driver. The core takes care of
@@ -279,7 +279,7 @@ struct spi_message;
* field of this structure.
*
* This represents the kind of device driver that uses SPI messages to
- * interact with the hardware at the other end of a SPI link. It's called
+ * interact with the hardware at the other end of an SPI link. It's called
* a "protocol" driver because it works through messages rather than talking
* directly to SPI hardware (which is what the underlying SPI controller
* driver does to pass those messages). These protocols are defined in the
@@ -323,7 +323,7 @@ extern struct spi_device *spi_new_ancillary_device(struct spi_device *spi, u8 ch
__spi_register_driver(THIS_MODULE, driver)
/**
- * module_spi_driver() - Helper macro for registering a SPI driver
+ * module_spi_driver() - Helper macro for registering an SPI driver
* @__spi_driver: spi_driver struct
*
* Helper macro for SPI drivers which do not do anything special in module
@@ -839,7 +839,7 @@ int acpi_spi_count_resources(struct acpi_device *adev);
#endif
/*
- * SPI resource management while processing a SPI message
+ * SPI resource management while processing an SPI message
*/
typedef void (*spi_res_release_t)(struct spi_controller *ctlr,
@@ -1454,7 +1454,7 @@ static inline ssize_t spi_w8r16be(struct spi_device *spi, u8 cmd)
*/
/**
- * struct spi_board_info - board-specific template for a SPI device
+ * struct spi_board_info - board-specific template for an SPI device
* @modalias: Initializes spi_device.modalias; identifies the driver.
* @platform_data: Initializes spi_device.platform_data; the particular
* data stored there is driver-specific.
The deciding factor for when a/an should be used is the sound that begins the word which follows these indefinite articles, rather than the letter which does. Use "an SPI" (SPI begins with the consonant letter S, but the S is pronounced with its letter name, "es."). Used sed to do the replacement: find . -type f -exec sed -i "s/ a SPI/ an SPI/g" {} \; Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org> --- Generated on top of v6.2-rc6. .../bindings/display/himax,hx8357d.txt | 2 +- .../bindings/display/ilitek,ili9225.txt | 2 +- .../bindings/display/multi-inno,mi0283qt.txt | 2 +- .../bindings/display/panel/lg,lg4573.yaml | 2 +- .../display/panel/samsung,lms397kf04.yaml | 2 +- .../devicetree/bindings/display/repaper.txt | 2 +- .../bindings/display/sitronix,st7586.txt | 2 +- .../bindings/iio/accel/adi,adis16240.yaml | 2 +- .../bindings/iio/accel/adi,adxl313.yaml | 2 +- .../bindings/iio/accel/adi,adxl345.yaml | 2 +- .../devicetree/bindings/iio/accel/lis302.txt | 2 +- .../bindings/iio/accel/nxp,fxls8962af.yaml | 2 +- .../bindings/iio/adc/microchip,mcp3201.yaml | 2 +- .../bindings/input/touchscreen/ads7846.txt | 2 +- .../devicetree/bindings/leds/leds-lp8860.txt | 2 +- .../bindings/media/renesas,drif.yaml | 2 +- .../memory-controllers/renesas,rpc-if.yaml | 2 +- .../devicetree/bindings/mfd/atmel-flexcom.txt | 2 +- .../bindings/misc/olpc,xo1.75-ec.yaml | 2 +- .../devicetree/bindings/mmc/mmc-spi-slot.yaml | 2 +- .../bindings/net/dsa/vitesse,vsc73xx.txt | 2 +- .../bindings/net/microchip,enc28j60.txt | 2 +- .../devicetree/bindings/net/wiznet,w5x00.txt | 2 +- .../bindings/spi/brcm,spi-bcm-qspi.yaml | 4 ++-- .../bindings/spi/marvell,mmp2-ssp.yaml | 2 +- .../bindings/spi/mxicy,mx25f0a-spi.yaml | 2 +- .../bindings/spi/snps,dw-apb-ssi.yaml | 2 +- .../devicetree/bindings/spi/spi-mux.yaml | 2 +- .../bindings/spi/spi-peripheral-props.yaml | 2 +- Documentation/driver-api/mtd/spi-nor.rst | 4 ++-- .../firmware-guide/acpi/enumeration.rst | 2 +- .../firmware-guide/acpi/gpio-properties.rst | 2 +- .../sound/designs/compress-offload.rst | 2 +- Documentation/spi/spi-lm70llp.rst | 4 ++-- Documentation/spi/spidev.rst | 4 ++-- arch/arm/boot/dts/imx7d-flex-concentrator.dts | 2 +- .../cavium-octeon/executive/cvmx-helper-spi.c | 6 +++--- arch/mips/cavium-octeon/executive/cvmx-spi.c | 16 ++++++++-------- arch/mips/include/asm/octeon/cvmx-helper-spi.h | 4 ++-- arch/mips/include/asm/octeon/cvmx-spi.h | 18 +++++++++--------- arch/mips/include/asm/octeon/cvmx-wqe.h | 2 +- drivers/auxdisplay/lcd2s.c | 2 +- drivers/gpu/drm/solomon/ssd130x-spi.c | 2 +- drivers/gpu/drm/tiny/ili9486.c | 2 +- drivers/input/misc/Kconfig | 4 ++-- drivers/input/rmi4/Kconfig | 2 +- drivers/input/touchscreen/Kconfig | 2 +- drivers/mfd/Kconfig | 2 +- drivers/mfd/ocelot.h | 2 +- drivers/mmc/host/Kconfig | 2 +- drivers/mtd/spi-nor/controllers/Kconfig | 2 +- drivers/mtd/spi-nor/core.c | 14 +++++++------- drivers/mtd/spi-nor/core.h | 4 ++-- drivers/mtd/spi-nor/sfdp.c | 6 +++--- .../net/dsa/sja1105/sja1105_dynamic_config.c | 4 ++-- drivers/net/ethernet/microchip/enc28j60.c | 2 +- .../net/wireless/microchip/wilc1000/Kconfig | 2 +- drivers/net/wireless/st/cw1200/Kconfig | 2 +- drivers/platform/chrome/Kconfig | 2 +- drivers/platform/chrome/cros_ec_spi.c | 2 +- drivers/rtc/rtc-ds1305.c | 2 +- drivers/spi/Kconfig | 8 ++++---- drivers/spi/spi-mem.c | 10 +++++----- drivers/spi/spi-mpc52xx-psc.c | 2 +- drivers/spi/spi.c | 4 ++-- drivers/staging/fbtft/fbtft.h | 2 +- drivers/staging/iio/meter/Kconfig | 2 +- drivers/staging/octeon/ethernet-spi.c | 2 +- drivers/usb/host/max3421-hcd.c | 2 +- include/linux/mtd/spinand.h | 14 +++++++------- include/linux/rmi.h | 2 +- include/linux/spi/spi-mem.h | 18 +++++++++--------- include/linux/spi/spi.h | 8 ++++---- 73 files changed, 131 insertions(+), 131 deletions(-)