| Message ID | 971c400abf7f88a6be322db72481c075d3ceb233.1674818705.git.oleksii.kurochko@gmail.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | RISCV basic exception handling implementation | expand |
On Sat, Jan 28, 2023 at 12:00 AM Oleksii Kurochko <oleksii.kurochko@gmail.com> wrote: > > Work with some registers requires csr command which is part of > Zicsr. > > Signed-off-by: Oleksii Kurochko <oleksii.kurochko@gmail.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Alistair > --- > Changes in V2: > - Nothing changed > --- > xen/arch/riscv/arch.mk | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/xen/arch/riscv/arch.mk b/xen/arch/riscv/arch.mk > index 012dc677c3..95b41d9f3e 100644 > --- a/xen/arch/riscv/arch.mk > +++ b/xen/arch/riscv/arch.mk > @@ -10,7 +10,7 @@ riscv-march-$(CONFIG_RISCV_ISA_C) := $(riscv-march-y)c > # into the upper half _or_ the lower half of the address space. > # -mcmodel=medlow would force Xen into the lower half. > > -CFLAGS += -march=$(riscv-march-y) -mstrict-align -mcmodel=medany > +CFLAGS += -march=$(riscv-march-y)_zicsr -mstrict-align -mcmodel=medany > > # TODO: Drop override when more of the build is working > override ALL_OBJS-y = arch/$(TARGET_ARCH)/built_in.o > -- > 2.39.0 > >
On 31.01.2023 01:21, Alistair Francis wrote: > On Sat, Jan 28, 2023 at 12:00 AM Oleksii Kurochko > <oleksii.kurochko@gmail.com> wrote: >> >> Work with some registers requires csr command which is part of >> Zicsr. >> >> Signed-off-by: Oleksii Kurochko <oleksii.kurochko@gmail.com> > > Reviewed-by: Alistair Francis <alistair.francis@wdc.com> There is an open aspect Andrew has pointed out on an earlier version. I think it would be quite helpful if that could be settled one way or another before this patch gets committed (which formally may now be possible, depending on whether that open aspect is considered an "open" objection, as per ./MAINTAINERS). Jan
Hi Jan, On Tue, 2023-01-31 at 10:14 +0100, Jan Beulich wrote: > On 31.01.2023 01:21, Alistair Francis wrote: > > On Sat, Jan 28, 2023 at 12:00 AM Oleksii Kurochko > > <oleksii.kurochko@gmail.com> wrote: > > > > > > Work with some registers requires csr command which is part of > > > Zicsr. > > > > > > Signed-off-by: Oleksii Kurochko <oleksii.kurochko@gmail.com> > > > > Reviewed-by: Alistair Francis <alistair.francis@wdc.com> > > There is an open aspect Andrew has pointed out on an earlier version. > I think it would be quite helpful if that could be settled one way or > another before this patch gets committed (which formally may now be > possible, depending on whether that open aspect is considered an > "open" objection, as per ./MAINTAINERS). > I will change it to 'G' as Alistair doesn't see any sense to restrict ourselves: https://lore.kernel.org/xen-devel/CAKmqyKOecoz91e-4-KZUdgT5HNhuwuN83tpFR+HmwkUPb2r3ew@mail.gmail.com/ > Jan ~ Oleksii
diff --git a/xen/arch/riscv/arch.mk b/xen/arch/riscv/arch.mk index 012dc677c3..95b41d9f3e 100644 --- a/xen/arch/riscv/arch.mk +++ b/xen/arch/riscv/arch.mk @@ -10,7 +10,7 @@ riscv-march-$(CONFIG_RISCV_ISA_C) := $(riscv-march-y)c # into the upper half _or_ the lower half of the address space. # -mcmodel=medlow would force Xen into the lower half. -CFLAGS += -march=$(riscv-march-y) -mstrict-align -mcmodel=medany +CFLAGS += -march=$(riscv-march-y)_zicsr -mstrict-align -mcmodel=medany # TODO: Drop override when more of the build is working override ALL_OBJS-y = arch/$(TARGET_ARCH)/built_in.o
Work with some registers requires csr command which is part of Zicsr. Signed-off-by: Oleksii Kurochko <oleksii.kurochko@gmail.com> --- Changes in V2: - Nothing changed --- xen/arch/riscv/arch.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)