| Message ID | 20230212021534.59121-3-samuel@sholland.org (mailing list archive) |
|---|---|
| State | Accepted |
| Commit | d5a7fab7859dc88657372a448b78babcf134114e |
| Headers | show |
| Series | riscv: Fix alternatives issues on for-next | expand |
| Context | Check | Description |
|---|---|---|
| conchuod/cover_letter | success | Series has a cover letter |
| conchuod/tree_selection | success | Guessed tree name to be for-next |
| conchuod/fixes_present | success | Fixes tag not required for -next series |
| conchuod/maintainers_pattern | success | MAINTAINERS pattern errors before the patch: 13 and now 13 |
| conchuod/verify_signedoff | success | Signed-off-by tag matches author and committer |
| conchuod/kdoc | success | Errors and warnings before: 0 this patch: 0 |
| conchuod/build_rv64_clang_allmodconfig | success | Errors and warnings before: 2435 this patch: 2435 |
| conchuod/module_param | success | Was 0 now: 0 |
| conchuod/build_rv64_gcc_allmodconfig | success | Errors and warnings before: 17156 this patch: 17156 |
| conchuod/alphanumeric_selects | success | Out of order selects before the patch: 59 and now 59 |
| conchuod/build_rv32_defconfig | success | Build OK |
| conchuod/dtb_warn_rv64 | success | Errors and warnings before: 2 this patch: 2 |
| conchuod/header_inline | success | No static functions without inline keyword in header files |
| conchuod/checkpatch | success | total: 0 errors, 0 warnings, 0 checks, 35 lines checked |
| conchuod/source_inline | success | Was 0 now: 0 |
| conchuod/build_rv64_nommu_k210_defconfig | success | Build OK |
| conchuod/verify_fixes | success | Fixes tag looks correct |
| conchuod/build_rv64_nommu_virt_defconfig | success | Build OK |
On Sat, Feb 11, 2023 at 08:15:33PM -0600, Samuel Holland wrote: > Commit 4bf8860760d9 ("riscv: cpufeature: extend > riscv_cpufeature_patch_func to all ISA extensions") switched ISA > extension alternatives to use the RISCV_ISA_EXT_* macros instead of > CPUFEATURE_*. This was mismerged when applied on top of the Zbb series, > so the Zbb alternatives referenced the wrong errata ID values. > > Fixes: 9daca9a5b9ac ("Merge patch series "riscv: improve boot time isa extensions handling"") Re: your question on irc, I think you did the right thing here as Jisheng did remove them in his series: https://lore.kernel.org/linux-riscv/20230128172856.3814-5-jszhang@kernel.org/ Reviewed-by: Conor Dooley <conor.dooley@microchip.com> > Signed-off-by: Samuel Holland <samuel@sholland.org> > --- > > arch/riscv/include/asm/errata_list.h | 5 ----- > arch/riscv/lib/strcmp.S | 2 +- > arch/riscv/lib/strlen.S | 2 +- > arch/riscv/lib/strncmp.S | 2 +- > 4 files changed, 3 insertions(+), 8 deletions(-) > > diff --git a/arch/riscv/include/asm/errata_list.h b/arch/riscv/include/asm/errata_list.h > index e158439029ce..274c6f889602 100644 > --- a/arch/riscv/include/asm/errata_list.h > +++ b/arch/riscv/include/asm/errata_list.h > @@ -23,11 +23,6 @@ > #define ERRATA_THEAD_NUMBER 3 > #endif > > -#define CPUFEATURE_SVPBMT 0 > -#define CPUFEATURE_ZICBOM 1 > -#define CPUFEATURE_ZBB 2 > -#define CPUFEATURE_NUMBER 3 > - > #ifdef __ASSEMBLY__ > > #define ALT_INSN_FAULT(x) \ > diff --git a/arch/riscv/lib/strcmp.S b/arch/riscv/lib/strcmp.S > index 8148b6418f61..986ab23fe787 100644 > --- a/arch/riscv/lib/strcmp.S > +++ b/arch/riscv/lib/strcmp.S > @@ -9,7 +9,7 @@ > /* int strcmp(const char *cs, const char *ct) */ > SYM_FUNC_START(strcmp) > > - ALTERNATIVE("nop", "j strcmp_zbb", 0, CPUFEATURE_ZBB, CONFIG_RISCV_ISA_ZBB) > + ALTERNATIVE("nop", "j strcmp_zbb", 0, RISCV_ISA_EXT_ZBB, CONFIG_RISCV_ISA_ZBB) > > /* > * Returns > diff --git a/arch/riscv/lib/strlen.S b/arch/riscv/lib/strlen.S > index 0f9dbf93301a..8345ceeee3f6 100644 > --- a/arch/riscv/lib/strlen.S > +++ b/arch/riscv/lib/strlen.S > @@ -9,7 +9,7 @@ > /* int strlen(const char *s) */ > SYM_FUNC_START(strlen) > > - ALTERNATIVE("nop", "j strlen_zbb", 0, CPUFEATURE_ZBB, CONFIG_RISCV_ISA_ZBB) > + ALTERNATIVE("nop", "j strlen_zbb", 0, RISCV_ISA_EXT_ZBB, CONFIG_RISCV_ISA_ZBB) > > /* > * Returns > diff --git a/arch/riscv/lib/strncmp.S b/arch/riscv/lib/strncmp.S > index 7940ddab2d48..ee49595075be 100644 > --- a/arch/riscv/lib/strncmp.S > +++ b/arch/riscv/lib/strncmp.S > @@ -9,7 +9,7 @@ > /* int strncmp(const char *cs, const char *ct, size_t count) */ > SYM_FUNC_START(strncmp) > > - ALTERNATIVE("nop", "j strncmp_zbb", 0, CPUFEATURE_ZBB, CONFIG_RISCV_ISA_ZBB) > + ALTERNATIVE("nop", "j strncmp_zbb", 0, RISCV_ISA_EXT_ZBB, CONFIG_RISCV_ISA_ZBB) > > /* > * Returns > -- > 2.37.4 >
On Sat, Feb 11, 2023 at 08:15:33PM -0600, Samuel Holland wrote: > Commit 4bf8860760d9 ("riscv: cpufeature: extend > riscv_cpufeature_patch_func to all ISA extensions") switched ISA > extension alternatives to use the RISCV_ISA_EXT_* macros instead of > CPUFEATURE_*. This was mismerged when applied on top of the Zbb series, > so the Zbb alternatives referenced the wrong errata ID values. > > Fixes: 9daca9a5b9ac ("Merge patch series "riscv: improve boot time isa extensions handling"") > Signed-off-by: Samuel Holland <samuel@sholland.org> > --- > > arch/riscv/include/asm/errata_list.h | 5 ----- > arch/riscv/lib/strcmp.S | 2 +- > arch/riscv/lib/strlen.S | 2 +- > arch/riscv/lib/strncmp.S | 2 +- > 4 files changed, 3 insertions(+), 8 deletions(-) > Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Guo Ren <guoren@kernel.org> On Sun, Feb 12, 2023 at 10:15 AM Samuel Holland <samuel@sholland.org> wrote: > > Commit 4bf8860760d9 ("riscv: cpufeature: extend > riscv_cpufeature_patch_func to all ISA extensions") switched ISA > extension alternatives to use the RISCV_ISA_EXT_* macros instead of > CPUFEATURE_*. This was mismerged when applied on top of the Zbb series, > so the Zbb alternatives referenced the wrong errata ID values. > > Fixes: 9daca9a5b9ac ("Merge patch series "riscv: improve boot time isa extensions handling"") > Signed-off-by: Samuel Holland <samuel@sholland.org> > --- > > arch/riscv/include/asm/errata_list.h | 5 ----- > arch/riscv/lib/strcmp.S | 2 +- > arch/riscv/lib/strlen.S | 2 +- > arch/riscv/lib/strncmp.S | 2 +- > 4 files changed, 3 insertions(+), 8 deletions(-) > > diff --git a/arch/riscv/include/asm/errata_list.h b/arch/riscv/include/asm/errata_list.h > index e158439029ce..274c6f889602 100644 > --- a/arch/riscv/include/asm/errata_list.h > +++ b/arch/riscv/include/asm/errata_list.h > @@ -23,11 +23,6 @@ > #define ERRATA_THEAD_NUMBER 3 > #endif > > -#define CPUFEATURE_SVPBMT 0 > -#define CPUFEATURE_ZICBOM 1 > -#define CPUFEATURE_ZBB 2 > -#define CPUFEATURE_NUMBER 3 > - > #ifdef __ASSEMBLY__ > > #define ALT_INSN_FAULT(x) \ > diff --git a/arch/riscv/lib/strcmp.S b/arch/riscv/lib/strcmp.S > index 8148b6418f61..986ab23fe787 100644 > --- a/arch/riscv/lib/strcmp.S > +++ b/arch/riscv/lib/strcmp.S > @@ -9,7 +9,7 @@ > /* int strcmp(const char *cs, const char *ct) */ > SYM_FUNC_START(strcmp) > > - ALTERNATIVE("nop", "j strcmp_zbb", 0, CPUFEATURE_ZBB, CONFIG_RISCV_ISA_ZBB) > + ALTERNATIVE("nop", "j strcmp_zbb", 0, RISCV_ISA_EXT_ZBB, CONFIG_RISCV_ISA_ZBB) > > /* > * Returns > diff --git a/arch/riscv/lib/strlen.S b/arch/riscv/lib/strlen.S > index 0f9dbf93301a..8345ceeee3f6 100644 > --- a/arch/riscv/lib/strlen.S > +++ b/arch/riscv/lib/strlen.S > @@ -9,7 +9,7 @@ > /* int strlen(const char *s) */ > SYM_FUNC_START(strlen) > > - ALTERNATIVE("nop", "j strlen_zbb", 0, CPUFEATURE_ZBB, CONFIG_RISCV_ISA_ZBB) > + ALTERNATIVE("nop", "j strlen_zbb", 0, RISCV_ISA_EXT_ZBB, CONFIG_RISCV_ISA_ZBB) > > /* > * Returns > diff --git a/arch/riscv/lib/strncmp.S b/arch/riscv/lib/strncmp.S > index 7940ddab2d48..ee49595075be 100644 > --- a/arch/riscv/lib/strncmp.S > +++ b/arch/riscv/lib/strncmp.S > @@ -9,7 +9,7 @@ > /* int strncmp(const char *cs, const char *ct, size_t count) */ > SYM_FUNC_START(strncmp) > > - ALTERNATIVE("nop", "j strncmp_zbb", 0, CPUFEATURE_ZBB, CONFIG_RISCV_ISA_ZBB) > + ALTERNATIVE("nop", "j strncmp_zbb", 0, RISCV_ISA_EXT_ZBB, CONFIG_RISCV_ISA_ZBB) > > /* > * Returns > -- > 2.37.4 >
diff --git a/arch/riscv/include/asm/errata_list.h b/arch/riscv/include/asm/errata_list.h index e158439029ce..274c6f889602 100644 --- a/arch/riscv/include/asm/errata_list.h +++ b/arch/riscv/include/asm/errata_list.h @@ -23,11 +23,6 @@ #define ERRATA_THEAD_NUMBER 3 #endif -#define CPUFEATURE_SVPBMT 0 -#define CPUFEATURE_ZICBOM 1 -#define CPUFEATURE_ZBB 2 -#define CPUFEATURE_NUMBER 3 - #ifdef __ASSEMBLY__ #define ALT_INSN_FAULT(x) \ diff --git a/arch/riscv/lib/strcmp.S b/arch/riscv/lib/strcmp.S index 8148b6418f61..986ab23fe787 100644 --- a/arch/riscv/lib/strcmp.S +++ b/arch/riscv/lib/strcmp.S @@ -9,7 +9,7 @@ /* int strcmp(const char *cs, const char *ct) */ SYM_FUNC_START(strcmp) - ALTERNATIVE("nop", "j strcmp_zbb", 0, CPUFEATURE_ZBB, CONFIG_RISCV_ISA_ZBB) + ALTERNATIVE("nop", "j strcmp_zbb", 0, RISCV_ISA_EXT_ZBB, CONFIG_RISCV_ISA_ZBB) /* * Returns diff --git a/arch/riscv/lib/strlen.S b/arch/riscv/lib/strlen.S index 0f9dbf93301a..8345ceeee3f6 100644 --- a/arch/riscv/lib/strlen.S +++ b/arch/riscv/lib/strlen.S @@ -9,7 +9,7 @@ /* int strlen(const char *s) */ SYM_FUNC_START(strlen) - ALTERNATIVE("nop", "j strlen_zbb", 0, CPUFEATURE_ZBB, CONFIG_RISCV_ISA_ZBB) + ALTERNATIVE("nop", "j strlen_zbb", 0, RISCV_ISA_EXT_ZBB, CONFIG_RISCV_ISA_ZBB) /* * Returns diff --git a/arch/riscv/lib/strncmp.S b/arch/riscv/lib/strncmp.S index 7940ddab2d48..ee49595075be 100644 --- a/arch/riscv/lib/strncmp.S +++ b/arch/riscv/lib/strncmp.S @@ -9,7 +9,7 @@ /* int strncmp(const char *cs, const char *ct, size_t count) */ SYM_FUNC_START(strncmp) - ALTERNATIVE("nop", "j strncmp_zbb", 0, CPUFEATURE_ZBB, CONFIG_RISCV_ISA_ZBB) + ALTERNATIVE("nop", "j strncmp_zbb", 0, RISCV_ISA_EXT_ZBB, CONFIG_RISCV_ISA_ZBB) /* * Returns
Commit 4bf8860760d9 ("riscv: cpufeature: extend riscv_cpufeature_patch_func to all ISA extensions") switched ISA extension alternatives to use the RISCV_ISA_EXT_* macros instead of CPUFEATURE_*. This was mismerged when applied on top of the Zbb series, so the Zbb alternatives referenced the wrong errata ID values. Fixes: 9daca9a5b9ac ("Merge patch series "riscv: improve boot time isa extensions handling"") Signed-off-by: Samuel Holland <samuel@sholland.org> --- arch/riscv/include/asm/errata_list.h | 5 ----- arch/riscv/lib/strcmp.S | 2 +- arch/riscv/lib/strlen.S | 2 +- arch/riscv/lib/strncmp.S | 2 +- 4 files changed, 3 insertions(+), 8 deletions(-)