| Message ID | 20230213185218.166520-6-quic_molvera@quicinc.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | remoteproc: qcom_q6v5_pas: Add support for QDU1000/QRU1000 mpss | expand |
On 13/02/2023 19:52, Melody Olvera wrote: > This documents the compatible for the component used to boot the > MPSS on the QDU1000 and QRU1000 SoCs. > > The QDU1000 and QRU1000 mpss boot process now requires the specification > of an RMB register space to complete the handshake needed to start or > attach the mpss. > > Signed-off-by: Melody Olvera <quic_molvera@quicinc.com> > --- > .../bindings/remoteproc/qcom,qdu1000-pas.yaml | 127 ++++++++++++++++++ > 1 file changed, 127 insertions(+) > create mode 100644 Documentation/devicetree/bindings/remoteproc/qcom,qdu1000-pas.yaml > > diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,qdu1000-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,qdu1000-pas.yaml > new file mode 100644 > index 000000000000..eb6ade984778 > --- /dev/null > +++ b/Documentation/devicetree/bindings/remoteproc/qcom,qdu1000-pas.yaml > @@ -0,0 +1,127 @@ > +# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/remoteproc/qcom,qdu1000-pas.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Qualcomm QDU1000 Peripheral Authentication Service > + > +maintainers: > + - Melody Olvera <quic_molvera@quicinc.com> > + > +description: > + Qualcomm QDU1000 SoC Peripheral Authentication Service loads and boots firmware > + on the Qualcomm DSP Hexagon cores. > + > +properties: > + compatible: > + enum: > + - qcom,qdu1000-mpss-pas What about other remote processors? The subject prefix suggests it is only for mpss, but filename is different. > + > + reg: > + maxItems: 2 > + > + clocks: > + items: > + - description: XO clock > + > + clock-names: > + items: > + - const: xo > + > + qcom,qmp: > + $ref: /schemas/types.yaml#/definitions/phandle > + description: Reference to the AOSS side-channel message RAM. > + > + smd-edge: false > + > + firmware-name: > + $ref: /schemas/types.yaml#/definitions/string-array > + items: > + - description: Firmware name of the Hexagon core > + - description: Firmware name of the Hexagon Devicetree > + > + memory-region: > + items: > + - description: Memory region for main Firmware authentication > + - description: Memory region for Devicetree Firmware authentication > + - description: DSM Memory region > + > + interrupts: > + minItems: 6 > + > + interrupt-names: > + minItems: 6 > + > + interconnects: > + minItems: 1 You can drop the property. It's coming from qcom,pas-common.yaml > + > + power-domains: > + items: > + - description: CX power domain > + - description: MSS power domain > + > + power-domain-names: > + items: > + - const: cx > + - const: mss > + > +required: > + - compatible > + - reg > + > +allOf: > + - $ref: /schemas/remoteproc/qcom,pas-common.yaml# > + > +unevaluatedProperties: false > + > +examples: > + - | > + #include <dt-bindings/clock/qcom,rpmh.h> > + #include <dt-bindings/interrupt-controller/irq.h> > + #include <dt-bindings/mailbox/qcom-ipcc.h> > + > + remoteproc@4080000 { > + compatible = "qcom,qdu1000-mpss-pas"; > + reg = <0x4080000 0x4040>, > + <0x4180000 0x1000>; > + > + clocks = <&rpmhcc RPMH_CXO_CLK>; > + clock-names = "xo"; > + > + interrupts-extended = <&intc GIC_SPI 264 IRQ_TYPE_EDGE_RISING>, > + <&smp2p_modem_in 0 IRQ_TYPE_EDGE_RISING>, > + <&smp2p_modem_in 1 IRQ_TYPE_EDGE_RISING>, > + <&smp2p_modem_in 2 IRQ_TYPE_EDGE_RISING>, > + <&smp2p_modem_in 3 IRQ_TYPE_EDGE_RISING> > + <&smp2p_modem_in 7 IRQ_TYPE_EDGE_RISING>; > + interrupt-names = "wdog", "fatal", "ready", "handover", > + "stop-ack", "shutdown-ack"; > + > + memory-region = <&mpss_mem>, <&dtb_mpss_mem>, <&mpss_dsm_mem>; > + > + firmware-name = "modem.mdt", > + "modem_dtb.mdt"; > + > + power-domains = <&rpmhpd QDU1000_CX>, > + <&rpmhpd QDU1000_MSS>; > + power-domain-names = "cx", "mss"; > + > + interconnects = <&mc_virt MASTER_LLCC &mc_virt SLAVE_EBI1>; > + > + qcom,qmp = <&aoss_qmp>; > + > + qcom,smem-states = <&smp2p_adsp_out 0>; > + qcom,smem-state-names = "stop"; > + > + glink-edge { > + interrupts-extended = <&ipcc IPCC_CLIENT_MPSS > + IPCC_MPROC_SIGNAL_GLINK_QMP > + IRQ_TYPE_EDGE_RISING>; > + mboxes = <&ipcc IPCC_CLIENT_MPSS IPCC_MPROC_SIGNAL_GLINK_QMP>; > + > + label = "modem"; > + qcom,remote-pid = <2>; > + Drop blank line > + }; > + }; Best regards, Krzysztof
On Mon, 13 Feb 2023 10:52:14 -0800, Melody Olvera wrote: > This documents the compatible for the component used to boot the > MPSS on the QDU1000 and QRU1000 SoCs. > > The QDU1000 and QRU1000 mpss boot process now requires the specification > of an RMB register space to complete the handshake needed to start or > attach the mpss. > > Signed-off-by: Melody Olvera <quic_molvera@quicinc.com> > --- > .../bindings/remoteproc/qcom,qdu1000-pas.yaml | 127 ++++++++++++++++++ > 1 file changed, 127 insertions(+) > create mode 100644 Documentation/devicetree/bindings/remoteproc/qcom,qdu1000-pas.yaml > My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check' on your patch (DT_CHECKER_FLAGS is new in v5.13): yamllint warnings/errors: dtschema/dtc warnings/errors: ./Documentation/devicetree/bindings/remoteproc/qcom,qdu1000-pas.yaml: Unable to find schema file matching $id: http://devicetree.org/schemas/remoteproc/qcom,pas-common.yaml Error: Documentation/devicetree/bindings/remoteproc/qcom,qdu1000-pas.example.dts:30.42-43 syntax error FATAL ERROR: Unable to parse input tree make[1]: *** [scripts/Makefile.lib:434: Documentation/devicetree/bindings/remoteproc/qcom,qdu1000-pas.example.dtb] Error 1 make[1]: *** Waiting for unfinished jobs.... make: *** [Makefile:1508: dt_binding_check] Error 2 doc reference errors (make refcheckdocs): See https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20230213185218.166520-6-quic_molvera@quicinc.com The base for the series is generally the latest rc1. A different dependency should be noted in *this* patch. If you already ran 'make dt_binding_check' and didn't see the above error(s), then make sure 'yamllint' is installed and dt-schema is up to date: pip3 install dtschema --upgrade Please check and re-submit after running the above command yourself. Note that DT_SCHEMA_FILES can be set to your schema file to speed up checking your schema. However, it must be unset to test all examples with your schema.
On 2/14/2023 12:28 AM, Krzysztof Kozlowski wrote: > On 13/02/2023 19:52, Melody Olvera wrote: >> This documents the compatible for the component used to boot the >> MPSS on the QDU1000 and QRU1000 SoCs. >> >> The QDU1000 and QRU1000 mpss boot process now requires the specification >> of an RMB register space to complete the handshake needed to start or >> attach the mpss. >> >> Signed-off-by: Melody Olvera <quic_molvera@quicinc.com> >> --- >> .../bindings/remoteproc/qcom,qdu1000-pas.yaml | 127 ++++++++++++++++++ >> 1 file changed, 127 insertions(+) >> create mode 100644 Documentation/devicetree/bindings/remoteproc/qcom,qdu1000-pas.yaml >> >> diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,qdu1000-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,qdu1000-pas.yaml >> new file mode 100644 >> index 000000000000..eb6ade984778 >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/remoteproc/qcom,qdu1000-pas.yaml >> @@ -0,0 +1,127 @@ >> +# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause >> +%YAML 1.2 >> +--- >> +$id: http://devicetree.org/schemas/remoteproc/qcom,qdu1000-pas.yaml# >> +$schema: http://devicetree.org/meta-schemas/core.yaml# >> + >> +title: Qualcomm QDU1000 Peripheral Authentication Service >> + >> +maintainers: >> + - Melody Olvera <quic_molvera@quicinc.com> >> + >> +description: >> + Qualcomm QDU1000 SoC Peripheral Authentication Service loads and boots firmware >> + on the Qualcomm DSP Hexagon cores. >> + >> +properties: >> + compatible: >> + enum: >> + - qcom,qdu1000-mpss-pas > What about other remote processors? The subject prefix suggests it is > only for mpss, but filename is different. Yeah so QDU1000 and QRU1000 only have mpss; there are no other remote processors. However, it uses the same PAS driver as the other remote processors on other SoCs. I can rename to Modem Peripheral Authentication Service. > >> + >> + reg: >> + maxItems: 2 >> + >> + clocks: >> + items: >> + - description: XO clock >> + >> + clock-names: >> + items: >> + - const: xo >> + >> + qcom,qmp: >> + $ref: /schemas/types.yaml#/definitions/phandle >> + description: Reference to the AOSS side-channel message RAM. >> + >> + smd-edge: false >> + >> + firmware-name: >> + $ref: /schemas/types.yaml#/definitions/string-array >> + items: >> + - description: Firmware name of the Hexagon core >> + - description: Firmware name of the Hexagon Devicetree >> + >> + memory-region: >> + items: >> + - description: Memory region for main Firmware authentication >> + - description: Memory region for Devicetree Firmware authentication >> + - description: DSM Memory region >> + >> + interrupts: >> + minItems: 6 >> + >> + interrupt-names: >> + minItems: 6 >> + >> + interconnects: >> + minItems: 1 > You can drop the property. It's coming from qcom,pas-common.yaml Got it. > >> + >> + power-domains: >> + items: >> + - description: CX power domain >> + - description: MSS power domain >> + >> + power-domain-names: >> + items: >> + - const: cx >> + - const: mss >> + >> +required: >> + - compatible >> + - reg >> + >> +allOf: >> + - $ref: /schemas/remoteproc/qcom,pas-common.yaml# >> + >> +unevaluatedProperties: false >> + >> +examples: >> + - | >> + #include <dt-bindings/clock/qcom,rpmh.h> >> + #include <dt-bindings/interrupt-controller/irq.h> >> + #include <dt-bindings/mailbox/qcom-ipcc.h> >> + >> + remoteproc@4080000 { >> + compatible = "qcom,qdu1000-mpss-pas"; >> + reg = <0x4080000 0x4040>, >> + <0x4180000 0x1000>; >> + >> + clocks = <&rpmhcc RPMH_CXO_CLK>; >> + clock-names = "xo"; >> + >> + interrupts-extended = <&intc GIC_SPI 264 IRQ_TYPE_EDGE_RISING>, >> + <&smp2p_modem_in 0 IRQ_TYPE_EDGE_RISING>, >> + <&smp2p_modem_in 1 IRQ_TYPE_EDGE_RISING>, >> + <&smp2p_modem_in 2 IRQ_TYPE_EDGE_RISING>, >> + <&smp2p_modem_in 3 IRQ_TYPE_EDGE_RISING> >> + <&smp2p_modem_in 7 IRQ_TYPE_EDGE_RISING>; >> + interrupt-names = "wdog", "fatal", "ready", "handover", >> + "stop-ack", "shutdown-ack"; >> + >> + memory-region = <&mpss_mem>, <&dtb_mpss_mem>, <&mpss_dsm_mem>; >> + >> + firmware-name = "modem.mdt", >> + "modem_dtb.mdt"; >> + >> + power-domains = <&rpmhpd QDU1000_CX>, >> + <&rpmhpd QDU1000_MSS>; >> + power-domain-names = "cx", "mss"; >> + >> + interconnects = <&mc_virt MASTER_LLCC &mc_virt SLAVE_EBI1>; >> + >> + qcom,qmp = <&aoss_qmp>; >> + >> + qcom,smem-states = <&smp2p_adsp_out 0>; >> + qcom,smem-state-names = "stop"; >> + >> + glink-edge { >> + interrupts-extended = <&ipcc IPCC_CLIENT_MPSS >> + IPCC_MPROC_SIGNAL_GLINK_QMP >> + IRQ_TYPE_EDGE_RISING>; >> + mboxes = <&ipcc IPCC_CLIENT_MPSS IPCC_MPROC_SIGNAL_GLINK_QMP>; >> + >> + label = "modem"; >> + qcom,remote-pid = <2>; >> + > Drop blank line Ok. Thanks, Melody > >> + }; >> + }; > Best regards, > Krzysztof >
On 14/02/2023 22:23, Melody Olvera wrote: > > > On 2/14/2023 12:28 AM, Krzysztof Kozlowski wrote: >> On 13/02/2023 19:52, Melody Olvera wrote: >>> This documents the compatible for the component used to boot the >>> MPSS on the QDU1000 and QRU1000 SoCs. >>> >>> The QDU1000 and QRU1000 mpss boot process now requires the specification >>> of an RMB register space to complete the handshake needed to start or >>> attach the mpss. >>> >>> Signed-off-by: Melody Olvera <quic_molvera@quicinc.com> >>> --- >>> .../bindings/remoteproc/qcom,qdu1000-pas.yaml | 127 ++++++++++++++++++ >>> 1 file changed, 127 insertions(+) >>> create mode 100644 Documentation/devicetree/bindings/remoteproc/qcom,qdu1000-pas.yaml >>> >>> diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,qdu1000-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,qdu1000-pas.yaml >>> new file mode 100644 >>> index 000000000000..eb6ade984778 >>> --- /dev/null >>> +++ b/Documentation/devicetree/bindings/remoteproc/qcom,qdu1000-pas.yaml >>> @@ -0,0 +1,127 @@ >>> +# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause >>> +%YAML 1.2 >>> +--- >>> +$id: http://devicetree.org/schemas/remoteproc/qcom,qdu1000-pas.yaml# >>> +$schema: http://devicetree.org/meta-schemas/core.yaml# >>> + >>> +title: Qualcomm QDU1000 Peripheral Authentication Service >>> + >>> +maintainers: >>> + - Melody Olvera <quic_molvera@quicinc.com> >>> + >>> +description: >>> + Qualcomm QDU1000 SoC Peripheral Authentication Service loads and boots firmware >>> + on the Qualcomm DSP Hexagon cores. >>> + >>> +properties: >>> + compatible: >>> + enum: >>> + - qcom,qdu1000-mpss-pas >> What about other remote processors? The subject prefix suggests it is >> only for mpss, but filename is different. > > Yeah so QDU1000 and QRU1000 only have mpss; there are no other remote processors. > However, it uses the same PAS driver as the other remote processors on other SoCs. > I can rename to Modem Peripheral Authentication Service. Yes, please rename the title. Also please rename the file (and $id) to be based on compatible: qcom,qdu1000-mpss-pas.yaml Best regards, Krzysztof
diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,qdu1000-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,qdu1000-pas.yaml new file mode 100644 index 000000000000..eb6ade984778 --- /dev/null +++ b/Documentation/devicetree/bindings/remoteproc/qcom,qdu1000-pas.yaml @@ -0,0 +1,127 @@ +# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/remoteproc/qcom,qdu1000-pas.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm QDU1000 Peripheral Authentication Service + +maintainers: + - Melody Olvera <quic_molvera@quicinc.com> + +description: + Qualcomm QDU1000 SoC Peripheral Authentication Service loads and boots firmware + on the Qualcomm DSP Hexagon cores. + +properties: + compatible: + enum: + - qcom,qdu1000-mpss-pas + + reg: + maxItems: 2 + + clocks: + items: + - description: XO clock + + clock-names: + items: + - const: xo + + qcom,qmp: + $ref: /schemas/types.yaml#/definitions/phandle + description: Reference to the AOSS side-channel message RAM. + + smd-edge: false + + firmware-name: + $ref: /schemas/types.yaml#/definitions/string-array + items: + - description: Firmware name of the Hexagon core + - description: Firmware name of the Hexagon Devicetree + + memory-region: + items: + - description: Memory region for main Firmware authentication + - description: Memory region for Devicetree Firmware authentication + - description: DSM Memory region + + interrupts: + minItems: 6 + + interrupt-names: + minItems: 6 + + interconnects: + minItems: 1 + + power-domains: + items: + - description: CX power domain + - description: MSS power domain + + power-domain-names: + items: + - const: cx + - const: mss + +required: + - compatible + - reg + +allOf: + - $ref: /schemas/remoteproc/qcom,pas-common.yaml# + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/clock/qcom,rpmh.h> + #include <dt-bindings/interrupt-controller/irq.h> + #include <dt-bindings/mailbox/qcom-ipcc.h> + + remoteproc@4080000 { + compatible = "qcom,qdu1000-mpss-pas"; + reg = <0x4080000 0x4040>, + <0x4180000 0x1000>; + + clocks = <&rpmhcc RPMH_CXO_CLK>; + clock-names = "xo"; + + interrupts-extended = <&intc GIC_SPI 264 IRQ_TYPE_EDGE_RISING>, + <&smp2p_modem_in 0 IRQ_TYPE_EDGE_RISING>, + <&smp2p_modem_in 1 IRQ_TYPE_EDGE_RISING>, + <&smp2p_modem_in 2 IRQ_TYPE_EDGE_RISING>, + <&smp2p_modem_in 3 IRQ_TYPE_EDGE_RISING> + <&smp2p_modem_in 7 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "wdog", "fatal", "ready", "handover", + "stop-ack", "shutdown-ack"; + + memory-region = <&mpss_mem>, <&dtb_mpss_mem>, <&mpss_dsm_mem>; + + firmware-name = "modem.mdt", + "modem_dtb.mdt"; + + power-domains = <&rpmhpd QDU1000_CX>, + <&rpmhpd QDU1000_MSS>; + power-domain-names = "cx", "mss"; + + interconnects = <&mc_virt MASTER_LLCC &mc_virt SLAVE_EBI1>; + + qcom,qmp = <&aoss_qmp>; + + qcom,smem-states = <&smp2p_adsp_out 0>; + qcom,smem-state-names = "stop"; + + glink-edge { + interrupts-extended = <&ipcc IPCC_CLIENT_MPSS + IPCC_MPROC_SIGNAL_GLINK_QMP + IRQ_TYPE_EDGE_RISING>; + mboxes = <&ipcc IPCC_CLIENT_MPSS IPCC_MPROC_SIGNAL_GLINK_QMP>; + + label = "modem"; + qcom,remote-pid = <2>; + + }; + };
This documents the compatible for the component used to boot the MPSS on the QDU1000 and QRU1000 SoCs. The QDU1000 and QRU1000 mpss boot process now requires the specification of an RMB register space to complete the handshake needed to start or attach the mpss. Signed-off-by: Melody Olvera <quic_molvera@quicinc.com> --- .../bindings/remoteproc/qcom,qdu1000-pas.yaml | 127 ++++++++++++++++++ 1 file changed, 127 insertions(+) create mode 100644 Documentation/devicetree/bindings/remoteproc/qcom,qdu1000-pas.yaml