| Message ID | 20230211064006.14981-7-semen.protsenko@linaro.org (mailing list archive) |
|---|---|
| State | Accepted |
| Commit | ad8f6ad9a4f219950df65731a8ff91baa022c4b0 |
| Headers | show |
| Series | clk: samsung: exynos850: Add missing clocks for PM | expand |
> -----Original Message----- > From: Sam Protsenko <semen.protsenko@linaro.org> > Sent: Saturday, February 11, 2023 3:40 PM > To: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>; Chanwoo Choi > <cw00.choi@samsung.com>; Sylwester Nawrocki <s.nawrocki@samsung.com>; Rob > Herring <robh+dt@kernel.org> > Cc: David Virag <virag.david003@gmail.com>; Chanho Park > <chanho61.park@samsung.com>; Alim Akhtar <alim.akhtar@samsung.com>; Sumit > Semwal <sumit.semwal@linaro.org>; Tomasz Figa <tomasz.figa@gmail.com>; > Michael Turquette <mturquette@baylibre.com>; Stephen Boyd > <sboyd@kernel.org>; linux-samsung-soc@vger.kernel.org; linux- > clk@vger.kernel.org; devicetree@vger.kernel.org; linux-arm- > kernel@lists.infradead.org; linux-kernel@vger.kernel.org > Subject: [PATCH 6/6] arm64: dts: exynos: Add CMU_G3D node for Exynos850 > SoC > > Add missing G3D clock domain to Exynos850 SoC device tree. > > Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> Reviewed-by: Chanho Park <chanho61.park@samsung.com> > --- > arch/arm64/boot/dts/exynos/exynos850.dtsi | 9 +++++++++ > 1 file changed, 9 insertions(+) > > diff --git a/arch/arm64/boot/dts/exynos/exynos850.dtsi > b/arch/arm64/boot/dts/exynos/exynos850.dtsi > index a38fe5129937..d67e98120313 100644 > --- a/arch/arm64/boot/dts/exynos/exynos850.dtsi > +++ b/arch/arm64/boot/dts/exynos/exynos850.dtsi > @@ -245,6 +245,15 @@ cmu_peri: clock-controller@10030000 { > "dout_peri_uart", "dout_peri_ip"; > }; > > + cmu_g3d: clock-controller@11400000 { > + compatible = "samsung,exynos850-cmu-g3d"; > + reg = <0x11400000 0x8000>; > + #clock-cells = <1>; > + > + clocks = <&oscclk>, <&cmu_top CLK_DOUT_G3D_SWITCH>; > + clock-names = "oscclk", "dout_g3d_switch"; > + }; > + > cmu_apm: clock-controller@11800000 { > compatible = "samsung,exynos850-cmu-apm"; > reg = <0x11800000 0x8000>; > -- > 2.39.1
diff --git a/arch/arm64/boot/dts/exynos/exynos850.dtsi b/arch/arm64/boot/dts/exynos/exynos850.dtsi index a38fe5129937..d67e98120313 100644 --- a/arch/arm64/boot/dts/exynos/exynos850.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos850.dtsi @@ -245,6 +245,15 @@ cmu_peri: clock-controller@10030000 { "dout_peri_uart", "dout_peri_ip"; }; + cmu_g3d: clock-controller@11400000 { + compatible = "samsung,exynos850-cmu-g3d"; + reg = <0x11400000 0x8000>; + #clock-cells = <1>; + + clocks = <&oscclk>, <&cmu_top CLK_DOUT_G3D_SWITCH>; + clock-names = "oscclk", "dout_g3d_switch"; + }; + cmu_apm: clock-controller@11800000 { compatible = "samsung,exynos850-cmu-apm"; reg = <0x11800000 0x8000>;
Add missing G3D clock domain to Exynos850 SoC device tree. Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> --- arch/arm64/boot/dts/exynos/exynos850.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+)