| Message ID | 20230303145138.29233-9-jagan@amarulasolutions.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm: Add Samsung MIPI DSIM bridge | expand |
On Fri, Mar 03, 2023 at 08:21:30PM +0530, Jagan Teki wrote: > LCDIF-DSIM glue logic inverts the HS/VS/DE signals and expecting > the i.MX8M Mini/Nano DSI host to add additional Data Enable signal > active low (DE_LOW). This makes the valid data transfer on each > horizontal line. > > So, add additional bus flags DE_LOW setting via input_bus_flags > for i.MX8M Mini/Nano platforms. > > Reviewed-by: Marek Vasut <marex@denx.de> > Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de> > Suggested-by: Marek Vasut <marex@denx.de> > Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> > --- > Changes for v15, v13: > - none > Changes for v12: > - collect RB from Marek > Changes for v11: > - collect RB from Frieder > Changes for v10, v9: > - none > Changes for v8: > - add DE_LOW for i.MX8M Mini/Nano platforms. > Changes for v7, v6: > - none > Changes for v5: > - rebased based on updated bridge changes > Changes for v4 - v1: > - none > > drivers/gpu/drm/exynos/exynos_drm_dsi.c | 8 ++++++++ > 1 file changed, 8 insertions(+) > > diff --git a/drivers/gpu/drm/exynos/exynos_drm_dsi.c b/drivers/gpu/drm/exynos/exynos_drm_dsi.c > index 796480e4a18b..5d971b607e1a 100644 > --- a/drivers/gpu/drm/exynos/exynos_drm_dsi.c > +++ b/drivers/gpu/drm/exynos/exynos_drm_dsi.c > @@ -1736,6 +1736,10 @@ static const struct component_ops exynos_dsi_component_ops = { > .unbind = exynos_dsi_unbind, > }; > > +static const struct drm_bridge_timings dsim_bridge_timings_de_low = { > + .input_bus_flags = DRM_BUS_FLAG_DE_LOW, > +}; > + > static int exynos_dsi_probe(struct platform_device *pdev) > { > struct device *dev = &pdev->dev; > @@ -1822,6 +1826,10 @@ static int exynos_dsi_probe(struct platform_device *pdev) > dsi->bridge.type = DRM_MODE_CONNECTOR_DSI; > dsi->bridge.pre_enable_prev_first = true; > > + /* DE_LOW: i.MX8M Mini/Nano LCDIF-DSIM glue logic inverts HS/VS/DE */ > + if (dsi->plat_data->hw_type == DSIM_TYPE_IMX8MM) That commit isn't bisectable, you add that enum variant in the last patch so this won't compile. Maxime
On Fri, Mar 03, 2023 at 04:00:19PM +0100, Maxime Ripard wrote: > On Fri, Mar 03, 2023 at 08:21:30PM +0530, Jagan Teki wrote: > > LCDIF-DSIM glue logic inverts the HS/VS/DE signals and expecting > > the i.MX8M Mini/Nano DSI host to add additional Data Enable signal > > active low (DE_LOW). This makes the valid data transfer on each > > horizontal line. > > > > So, add additional bus flags DE_LOW setting via input_bus_flags > > for i.MX8M Mini/Nano platforms. > > > > Reviewed-by: Marek Vasut <marex@denx.de> > > Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de> > > Suggested-by: Marek Vasut <marex@denx.de> > > Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> > > --- > > Changes for v15, v13: > > - none > > Changes for v12: > > - collect RB from Marek > > Changes for v11: > > - collect RB from Frieder > > Changes for v10, v9: > > - none > > Changes for v8: > > - add DE_LOW for i.MX8M Mini/Nano platforms. > > Changes for v7, v6: > > - none > > Changes for v5: > > - rebased based on updated bridge changes > > Changes for v4 - v1: > > - none > > > > drivers/gpu/drm/exynos/exynos_drm_dsi.c | 8 ++++++++ > > 1 file changed, 8 insertions(+) > > > > diff --git a/drivers/gpu/drm/exynos/exynos_drm_dsi.c b/drivers/gpu/drm/exynos/exynos_drm_dsi.c > > index 796480e4a18b..5d971b607e1a 100644 > > --- a/drivers/gpu/drm/exynos/exynos_drm_dsi.c > > +++ b/drivers/gpu/drm/exynos/exynos_drm_dsi.c > > @@ -1736,6 +1736,10 @@ static const struct component_ops exynos_dsi_component_ops = { > > .unbind = exynos_dsi_unbind, > > }; > > > > +static const struct drm_bridge_timings dsim_bridge_timings_de_low = { > > + .input_bus_flags = DRM_BUS_FLAG_DE_LOW, > > +}; > > + > > static int exynos_dsi_probe(struct platform_device *pdev) > > { > > struct device *dev = &pdev->dev; > > @@ -1822,6 +1826,10 @@ static int exynos_dsi_probe(struct platform_device *pdev) > > dsi->bridge.type = DRM_MODE_CONNECTOR_DSI; > > dsi->bridge.pre_enable_prev_first = true; > > > > + /* DE_LOW: i.MX8M Mini/Nano LCDIF-DSIM glue logic inverts HS/VS/DE */ > > + if (dsi->plat_data->hw_type == DSIM_TYPE_IMX8MM) > > That commit isn't bisectable, you add that enum variant in the last > patch so this won't compile. Scratch that, it's defined in the previous patch, sorry Maxime
diff --git a/drivers/gpu/drm/exynos/exynos_drm_dsi.c b/drivers/gpu/drm/exynos/exynos_drm_dsi.c index 796480e4a18b..5d971b607e1a 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_dsi.c +++ b/drivers/gpu/drm/exynos/exynos_drm_dsi.c @@ -1736,6 +1736,10 @@ static const struct component_ops exynos_dsi_component_ops = { .unbind = exynos_dsi_unbind, }; +static const struct drm_bridge_timings dsim_bridge_timings_de_low = { + .input_bus_flags = DRM_BUS_FLAG_DE_LOW, +}; + static int exynos_dsi_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; @@ -1822,6 +1826,10 @@ static int exynos_dsi_probe(struct platform_device *pdev) dsi->bridge.type = DRM_MODE_CONNECTOR_DSI; dsi->bridge.pre_enable_prev_first = true; + /* DE_LOW: i.MX8M Mini/Nano LCDIF-DSIM glue logic inverts HS/VS/DE */ + if (dsi->plat_data->hw_type == DSIM_TYPE_IMX8MM) + dsi->bridge.timings = &dsim_bridge_timings_de_low; + ret = component_add(dev, &exynos_dsi_component_ops); if (ret) goto err_disable_runtime;