| Message ID | 20230221174822.1378667-4-nsg@linux.ibm.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [kvm-unit-tests,v2,1/3] s390x/spec_ex: Use PSW macro | expand |
On Tue, 21 Feb 2023 18:48:22 +0100 Nina Schoetterl-Glausch <nsg@linux.ibm.com> wrote: > The EXECUTE instruction executes the instruction at the given target > address. This address must be halfword aligned, otherwise a > specification exception occurs. > Add a test for this. > > Signed-off-by: Nina Schoetterl-Glausch <nsg@linux.ibm.com> > --- > s390x/spec_ex.c | 25 +++++++++++++++++++++++++ > 1 file changed, 25 insertions(+) > > diff --git a/s390x/spec_ex.c b/s390x/spec_ex.c > index a26c56aa..dd097f9b 100644 > --- a/s390x/spec_ex.c > +++ b/s390x/spec_ex.c > @@ -177,6 +177,30 @@ static int short_psw_bit_12_is_0(void) > return 0; > } > > +static int odd_ex_target(void) > +{ > + uint64_t pre_target_addr; > + int to = 0, from = 0x0dd; > + > + asm volatile ( ".pushsection .rodata\n" and this should go in a .text.something subsection, as we discussed offline > + "pre_odd_ex_target:\n" shouldn't the label be after the align? > + " .balign 2\n" (i.e. here) > + " . = . + 1\n" > + " lr %[to],%[from]\n" > + " .popsection\n" > + > + " larl %[pre_target_addr],pre_odd_ex_target\n" > + " ex 0,1(%[pre_target_addr])\n" > + : [pre_target_addr] "=&a" (pre_target_addr), > + [to] "+d" (to) > + : [from] "d" (from) > + ); > + > + assert((pre_target_addr + 1) & 1); > + report(to != from, "did not perform ex with odd target"); > + return 0; > +} > + > static int bad_alignment(void) > { > uint32_t words[5] __attribute__((aligned(16))); > @@ -218,6 +242,7 @@ static const struct spec_ex_trigger spec_ex_triggers[] = { > { "psw_bit_12_is_1", &psw_bit_12_is_1, false, &fixup_invalid_psw }, > { "short_psw_bit_12_is_0", &short_psw_bit_12_is_0, false, &fixup_invalid_psw }, > { "psw_odd_address", &psw_odd_address, false, &fixup_invalid_psw }, > + { "odd_ex_target", &odd_ex_target, true, NULL }, > { "bad_alignment", &bad_alignment, true, NULL }, > { "not_even", ¬_even, true, NULL }, > { NULL, NULL, false, NULL },
On Tue, 2023-03-14 at 16:25 +0100, Claudio Imbrenda wrote: > On Tue, 21 Feb 2023 18:48:22 +0100 > Nina Schoetterl-Glausch <nsg@linux.ibm.com> wrote: > > > The EXECUTE instruction executes the instruction at the given target > > address. This address must be halfword aligned, otherwise a > > specification exception occurs. > > Add a test for this. > > > > Signed-off-by: Nina Schoetterl-Glausch <nsg@linux.ibm.com> > > --- > > s390x/spec_ex.c | 25 +++++++++++++++++++++++++ > > 1 file changed, 25 insertions(+) > > > > diff --git a/s390x/spec_ex.c b/s390x/spec_ex.c > > index a26c56aa..dd097f9b 100644 > > --- a/s390x/spec_ex.c > > +++ b/s390x/spec_ex.c > > @@ -177,6 +177,30 @@ static int short_psw_bit_12_is_0(void) > > return 0; > > } > > > > +static int odd_ex_target(void) > > +{ > > + uint64_t pre_target_addr; > > + int to = 0, from = 0x0dd; > > + > > + asm volatile ( ".pushsection .rodata\n" > > and this should go in a .text.something subsection, as we discussed > offline Yes. > > > + "pre_odd_ex_target:\n" > > shouldn't the label be after the align? No, larl needs an aligned address, and the ex below adds 1. That's why it has the pre_ prefix, it's not the ex target itself. > > > + " .balign 2\n" > > (i.e. here) > > > + " . = . + 1\n" > > + " lr %[to],%[from]\n" > > + " .popsection\n" > > + > > + " larl %[pre_target_addr],pre_odd_ex_target\n" > > + " ex 0,1(%[pre_target_addr])\n" > > + : [pre_target_addr] "=&a" (pre_target_addr), > > + [to] "+d" (to) > > + : [from] "d" (from) > > + ); > > + > > + assert((pre_target_addr + 1) & 1); > > + report(to != from, "did not perform ex with odd target"); > > + return 0; > > +} > > + > > static int bad_alignment(void) > > { > > uint32_t words[5] __attribute__((aligned(16))); > > @@ -218,6 +242,7 @@ static const struct spec_ex_trigger spec_ex_triggers[] = { > > { "psw_bit_12_is_1", &psw_bit_12_is_1, false, &fixup_invalid_psw }, > > { "short_psw_bit_12_is_0", &short_psw_bit_12_is_0, false, &fixup_invalid_psw }, > > { "psw_odd_address", &psw_odd_address, false, &fixup_invalid_psw }, > > + { "odd_ex_target", &odd_ex_target, true, NULL }, > > { "bad_alignment", &bad_alignment, true, NULL }, > > { "not_even", ¬_even, true, NULL }, > > { NULL, NULL, false, NULL }, >
On Tue, 14 Mar 2023 17:41:24 +0100 Nina Schoetterl-Glausch <nsg@linux.ibm.com> wrote: > On Tue, 2023-03-14 at 16:25 +0100, Claudio Imbrenda wrote: > > On Tue, 21 Feb 2023 18:48:22 +0100 > > Nina Schoetterl-Glausch <nsg@linux.ibm.com> wrote: > > > > > The EXECUTE instruction executes the instruction at the given target > > > address. This address must be halfword aligned, otherwise a > > > specification exception occurs. > > > Add a test for this. > > > > > > Signed-off-by: Nina Schoetterl-Glausch <nsg@linux.ibm.com> > > > --- > > > s390x/spec_ex.c | 25 +++++++++++++++++++++++++ > > > 1 file changed, 25 insertions(+) > > > > > > diff --git a/s390x/spec_ex.c b/s390x/spec_ex.c > > > index a26c56aa..dd097f9b 100644 > > > --- a/s390x/spec_ex.c > > > +++ b/s390x/spec_ex.c > > > @@ -177,6 +177,30 @@ static int short_psw_bit_12_is_0(void) > > > return 0; > > > } > > > > > > +static int odd_ex_target(void) > > > +{ > > > + uint64_t pre_target_addr; > > > + int to = 0, from = 0x0dd; > > > + > > > + asm volatile ( ".pushsection .rodata\n" > > > > and this should go in a .text.something subsection, as we discussed > > offline > > Yes. > > > > > + "pre_odd_ex_target:\n" > > > > shouldn't the label be after the align? > > No, larl needs an aligned address, and the ex below adds 1. > That's why it has the pre_ prefix, it's not the ex target itself. I understand that, but > > > > > + " .balign 2\n" doesn't the address get aligned here? so the label here would be aligned to 2 > > > > (i.e. here) > > > > > + " . = . + 1\n" and here it gets the +1? > > > + " lr %[to],%[from]\n" > > > + " .popsection\n" > > > + > > > + " larl %[pre_target_addr],pre_odd_ex_target\n" > > > + " ex 0,1(%[pre_target_addr])\n" > > > + : [pre_target_addr] "=&a" (pre_target_addr), > > > + [to] "+d" (to) > > > + : [from] "d" (from) > > > + ); > > > + > > > + assert((pre_target_addr + 1) & 1); > > > + report(to != from, "did not perform ex with odd target"); > > > + return 0; > > > +} > > > + > > > static int bad_alignment(void) > > > { > > > uint32_t words[5] __attribute__((aligned(16))); > > > @@ -218,6 +242,7 @@ static const struct spec_ex_trigger spec_ex_triggers[] = { > > > { "psw_bit_12_is_1", &psw_bit_12_is_1, false, &fixup_invalid_psw }, > > > { "short_psw_bit_12_is_0", &short_psw_bit_12_is_0, false, &fixup_invalid_psw }, > > > { "psw_odd_address", &psw_odd_address, false, &fixup_invalid_psw }, > > > + { "odd_ex_target", &odd_ex_target, true, NULL }, > > > { "bad_alignment", &bad_alignment, true, NULL }, > > > { "not_even", ¬_even, true, NULL }, > > > { NULL, NULL, false, NULL }, > > >
On Tue, 2023-03-14 at 18:12 +0100, Claudio Imbrenda wrote: > On Tue, 14 Mar 2023 17:41:24 +0100 > Nina Schoetterl-Glausch <nsg@linux.ibm.com> wrote: > > > On Tue, 2023-03-14 at 16:25 +0100, Claudio Imbrenda wrote: > > > On Tue, 21 Feb 2023 18:48:22 +0100 > > > Nina Schoetterl-Glausch <nsg@linux.ibm.com> wrote: > > > > > > > The EXECUTE instruction executes the instruction at the given target > > > > address. This address must be halfword aligned, otherwise a > > > > specification exception occurs. > > > > Add a test for this. > > > > > > > > Signed-off-by: Nina Schoetterl-Glausch <nsg@linux.ibm.com> > > > > --- > > > > s390x/spec_ex.c | 25 +++++++++++++++++++++++++ > > > > 1 file changed, 25 insertions(+) > > > > > > > > diff --git a/s390x/spec_ex.c b/s390x/spec_ex.c > > > > index a26c56aa..dd097f9b 100644 > > > > --- a/s390x/spec_ex.c > > > > +++ b/s390x/spec_ex.c > > > > @@ -177,6 +177,30 @@ static int short_psw_bit_12_is_0(void) > > > > return 0; > > > > } > > > > > > > > +static int odd_ex_target(void) > > > > +{ > > > > + uint64_t pre_target_addr; > > > > + int to = 0, from = 0x0dd; > > > > + > > > > + asm volatile ( ".pushsection .rodata\n" > > > > > > and this should go in a .text.something subsection, as we discussed > > > offline > > > > Yes. > > > > > > > + "pre_odd_ex_target:\n" > > > > > > shouldn't the label be after the align? > > > > No, larl needs an aligned address, and the ex below adds 1. > > That's why it has the pre_ prefix, it's not the ex target itself. > > I understand that, but > > > > > > > + " .balign 2\n" > > doesn't the address get aligned here? > so the label here would be aligned to 2 Uh, yeah, sorry. > > > > > > > (i.e. here) > > > > > > > + " . = . + 1\n" > > and here it gets the +1? > > > > > + " lr %[to],%[from]\n" > > > > + " .popsection\n" > > > > + > > > > + " larl %[pre_target_addr],pre_odd_ex_target\n" > > > > + " ex 0,1(%[pre_target_addr])\n" > > > > + : [pre_target_addr] "=&a" (pre_target_addr), > > > > + [to] "+d" (to) > > > > + : [from] "d" (from) > > > > + ); > > > > + > > > > + assert((pre_target_addr + 1) & 1); > > > > + report(to != from, "did not perform ex with odd target"); > > > > + return 0; > > > > +} > > > > + > > > > static int bad_alignment(void) > > > > { > > > > uint32_t words[5] __attribute__((aligned(16))); > > > > @@ -218,6 +242,7 @@ static const struct spec_ex_trigger spec_ex_triggers[] = { > > > > { "psw_bit_12_is_1", &psw_bit_12_is_1, false, &fixup_invalid_psw }, > > > > { "short_psw_bit_12_is_0", &short_psw_bit_12_is_0, false, &fixup_invalid_psw }, > > > > { "psw_odd_address", &psw_odd_address, false, &fixup_invalid_psw }, > > > > + { "odd_ex_target", &odd_ex_target, true, NULL }, > > > > { "bad_alignment", &bad_alignment, true, NULL }, > > > > { "not_even", ¬_even, true, NULL }, > > > > { NULL, NULL, false, NULL }, > > > > > >
diff --git a/s390x/spec_ex.c b/s390x/spec_ex.c index a26c56aa..dd097f9b 100644 --- a/s390x/spec_ex.c +++ b/s390x/spec_ex.c @@ -177,6 +177,30 @@ static int short_psw_bit_12_is_0(void) return 0; } +static int odd_ex_target(void) +{ + uint64_t pre_target_addr; + int to = 0, from = 0x0dd; + + asm volatile ( ".pushsection .rodata\n" + "pre_odd_ex_target:\n" + " .balign 2\n" + " . = . + 1\n" + " lr %[to],%[from]\n" + " .popsection\n" + + " larl %[pre_target_addr],pre_odd_ex_target\n" + " ex 0,1(%[pre_target_addr])\n" + : [pre_target_addr] "=&a" (pre_target_addr), + [to] "+d" (to) + : [from] "d" (from) + ); + + assert((pre_target_addr + 1) & 1); + report(to != from, "did not perform ex with odd target"); + return 0; +} + static int bad_alignment(void) { uint32_t words[5] __attribute__((aligned(16))); @@ -218,6 +242,7 @@ static const struct spec_ex_trigger spec_ex_triggers[] = { { "psw_bit_12_is_1", &psw_bit_12_is_1, false, &fixup_invalid_psw }, { "short_psw_bit_12_is_0", &short_psw_bit_12_is_0, false, &fixup_invalid_psw }, { "psw_odd_address", &psw_odd_address, false, &fixup_invalid_psw }, + { "odd_ex_target", &odd_ex_target, true, NULL }, { "bad_alignment", &bad_alignment, true, NULL }, { "not_even", ¬_even, true, NULL }, { NULL, NULL, false, NULL },
The EXECUTE instruction executes the instruction at the given target address. This address must be halfword aligned, otherwise a specification exception occurs. Add a test for this. Signed-off-by: Nina Schoetterl-Glausch <nsg@linux.ibm.com> --- s390x/spec_ex.c | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+)