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[1/8] dt-bindings: cpufreq: cpufreq-qcom-hw: Allow just 1 frequency domain

Message ID 20230308-topic-cpufreq_bindings-v1-1-3368473ec52d@linaro.org (mailing list archive)
State New, archived
Delegated to: viresh kumar
Headers show
Series qcom-cpufreq-hw binding improvements | expand

Commit Message

Konrad Dybcio March 8, 2023, 1:26 a.m. UTC
Some SoCs implementing CPUFREQ-HW only have a single frequency domain.
Allow such case.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
---
 Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

Comments

Rob Herring (Arm) March 16, 2023, 10:36 p.m. UTC | #1
On Wed, 08 Mar 2023 02:26:58 +0100, Konrad Dybcio wrote:
> Some SoCs implementing CPUFREQ-HW only have a single frequency domain.
> Allow such case.
> 
> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
> ---
>  Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 

Acked-by: Rob Herring <robh@kernel.org>
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml b/Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml
index e4aa8c67d532..aebf2254e45a 100644
--- a/Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml
+++ b/Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml
@@ -36,14 +36,14 @@  properties:
           - const: qcom,cpufreq-epss
 
   reg:
-    minItems: 2
+    minItems: 1
     items:
       - description: Frequency domain 0 register region
       - description: Frequency domain 1 register region
       - description: Frequency domain 2 register region
 
   reg-names:
-    minItems: 2
+    minItems: 1
     items:
       - const: freq-domain0
       - const: freq-domain1