[v6,0/4] RISC-V Hibernation Support

Message

Sia Jee Heng March 14, 2023, 5:03 a.m. UTC

This series adds RISC-V Hibernation/suspend to disk support.
Low level Arch functions were created to support hibernation.
swsusp_arch_suspend() relies code from __cpu_suspend_enter() to write
cpu state onto the stack, then calling swsusp_save() to save the memory
image.

Arch specific hibernation header is implemented and is utilized by the
arch_hibernation_header_restore() and arch_hibernation_header_save()
functions. The arch specific hibernation header consists of satp, hartid,
and the cpu_resume address. The kernel built version is also need to be
saved into the hibernation image header to making sure only the same
kernel is restore when resume.

swsusp_arch_resume() creates a temporary page table that covering only
the linear map. It copies the restore code to a 'safe' page, then start to
restore the memory image. Once completed, it restores the original
kernel's page table. It then calls into __hibernate_cpu_resume()
to restore the CPU context. Finally, it follows the normal hibernation
path back to the hibernation core.

To enable hibernation/suspend to disk into RISCV, the below config
need to be enabled:
- CONFIG_ARCH_HIBERNATION_HEADER
- CONFIG_ARCH_HIBERNATION_POSSIBLE

At high-level, this series includes the following changes:
1) Change suspend_save_csrs() and suspend_restore_csrs()
   to public function as these functions are common to
   suspend/hibernation. (patch 1)
2) Refactor the common code in the __cpu_resume_enter() function and
   __hibernate_cpu_resume() function. The common code are used by
   hibernation and suspend. (patch 2)
3) Enhance kernel_page_present() function to support huge page. (patch 3)
4) Add arch/riscv low level functions to support
   hibernation/suspend to disk. (patch 4)

The above patches are based on kernel v6.3-rc2 and are tested on
StarFive VF2 SBC board and Qemu. 
ACPI platform mode is not supported in this series.

Changes since v5:
- Rebased to kernel v6.3-rc2
- Removed extra line at the commit msg
- Added comment to describe the reason to map the kernel address

Changes since v4:
- Rebased to kernel v6.3-rc1
- Resolved typo(s)
- Removed unnecessary helper function
- Removed unnecessary "addr" local variable
- Removed typecast of 'int'
- Used def_bool HIBERNATION
- Used "mv a0, zero" instead of "add a0, zero, zero"
- Make linear region as executable and writable when restoring the
  image

Changes since v3:
- Rebased to kernel v6.2
- Temporary page table code refactoring by reference to ARM64
- Resolved typo(s) and grammars
- Resolved documentation errors
- Resolved clang build issue
- Removed unnecessary comments
- Used kzalloc instead of kcalloc

Changes since v2:
- Rebased to kernel v6.2-rc5
- Refactor the common code used by hibernation and suspend
- Create copy_page macro
- Solved other comments from Andrew and Conor

Changes since v1:
- Rebased to kernel v6.2-rc3
- Fixed bot's compilation error

Sia Jee Heng (4):
  RISC-V: Change suspend_save_csrs and suspend_restore_csrs to public
    function
  RISC-V: Factor out common code of __cpu_resume_enter()
  RISC-V: mm: Enable huge page support to kernel_page_present() function
  RISC-V: Add arch functions to support hibernation/suspend-to-disk

 arch/riscv/Kconfig                 |   6 +
 arch/riscv/include/asm/assembler.h |  82 ++++++
 arch/riscv/include/asm/suspend.h   |  22 ++
 arch/riscv/kernel/Makefile         |   1 +
 arch/riscv/kernel/asm-offsets.c    |   5 +
 arch/riscv/kernel/hibernate-asm.S  |  77 ++++++
 arch/riscv/kernel/hibernate.c      | 427 +++++++++++++++++++++++++++++
 arch/riscv/kernel/suspend.c        |   4 +-
 arch/riscv/kernel/suspend_entry.S  |  34 +--
 arch/riscv/mm/pageattr.c           |   8 +
 10 files changed, 633 insertions(+), 33 deletions(-)
 create mode 100644 arch/riscv/include/asm/assembler.h
 create mode 100644 arch/riscv/kernel/hibernate-asm.S
 create mode 100644 arch/riscv/kernel/hibernate.c


base-commit: fc89d7fb499b0162e081f434d45e8d1b47e82ece

Comments

Sia Jee Heng March 20, 2023, 7:20 a.m. UTC | #1

Hi,

I understand that you must be extremely busy, but I was wondering if there are any comments for the below v6 patch series?

Thanks
Regards
Jee Heng

> -----Original Message-----
> From: JeeHeng Sia <[e-mail]>
> Sent: Tuesday, March 14, 2023 1:03 PM
> To: [e-mail]; [e-mail]; [e-mail]
> Cc: [e-mail]; [e-mail]; JeeHeng Sia <[e-mail]>; Leyfoon Tan
> <[e-mail]>; Mason Huo <[e-mail]>
> Subject: [PATCH v6 0/4] RISC-V Hibernation Support
> 
> This series adds RISC-V Hibernation/suspend to disk support.
> Low level Arch functions were created to support hibernation.
> swsusp_arch_suspend() relies code from __cpu_suspend_enter() to write
> cpu state onto the stack, then calling swsusp_save() to save the memory
> image.
> 
> Arch specific hibernation header is implemented and is utilized by the
> arch_hibernation_header_restore() and arch_hibernation_header_save()
> functions. The arch specific hibernation header consists of satp, hartid,
> and the cpu_resume address. The kernel built version is also need to be
> saved into the hibernation image header to making sure only the same
> kernel is restore when resume.
> 
> swsusp_arch_resume() creates a temporary page table that covering only
> the linear map. It copies the restore code to a 'safe' page, then start to
> restore the memory image. Once completed, it restores the original
> kernel's page table. It then calls into __hibernate_cpu_resume()
> to restore the CPU context. Finally, it follows the normal hibernation
> path back to the hibernation core.
> 
> To enable hibernation/suspend to disk into RISCV, the below config
> need to be enabled:
> - CONFIG_ARCH_HIBERNATION_HEADER
> - CONFIG_ARCH_HIBERNATION_POSSIBLE
> 
> At high-level, this series includes the following changes:
> 1) Change suspend_save_csrs() and suspend_restore_csrs()
>    to public function as these functions are common to
>    suspend/hibernation. (patch 1)
> 2) Refactor the common code in the __cpu_resume_enter() function and
>    __hibernate_cpu_resume() function. The common code are used by
>    hibernation and suspend. (patch 2)
> 3) Enhance kernel_page_present() function to support huge page. (patch 3)
> 4) Add arch/riscv low level functions to support
>    hibernation/suspend to disk. (patch 4)
> 
> The above patches are based on kernel v6.3-rc2 and are tested on
> StarFive VF2 SBC board and Qemu.
> ACPI platform mode is not supported in this series.
> 
> Changes since v5:
> - Rebased to kernel v6.3-rc2
> - Removed extra line at the commit msg
> - Added comment to describe the reason to map the kernel address
> 
> Changes since v4:
> - Rebased to kernel v6.3-rc1
> - Resolved typo(s)
> - Removed unnecessary helper function
> - Removed unnecessary "addr" local variable
> - Removed typecast of 'int'
> - Used def_bool HIBERNATION
> - Used "mv a0, zero" instead of "add a0, zero, zero"
> - Make linear region as executable and writable when restoring the
>   image
> 
> Changes since v3:
> - Rebased to kernel v6.2
> - Temporary page table code refactoring by reference to ARM64
> - Resolved typo(s) and grammars
> - Resolved documentation errors
> - Resolved clang build issue
> - Removed unnecessary comments
> - Used kzalloc instead of kcalloc
> 
> Changes since v2:
> - Rebased to kernel v6.2-rc5
> - Refactor the common code used by hibernation and suspend
> - Create copy_page macro
> - Solved other comments from Andrew and Conor
> 
> Changes since v1:
> - Rebased to kernel v6.2-rc3
> - Fixed bot's compilation error
> 
> Sia Jee Heng (4):
>   RISC-V: Change suspend_save_csrs and suspend_restore_csrs to public
>     function
>   RISC-V: Factor out common code of __cpu_resume_enter()
>   RISC-V: mm: Enable huge page support to kernel_page_present() function
>   RISC-V: Add arch functions to support hibernation/suspend-to-disk
> 
>  arch/riscv/Kconfig                 |   6 +
>  arch/riscv/include/asm/assembler.h |  82 ++++++
>  arch/riscv/include/asm/suspend.h   |  22 ++
>  arch/riscv/kernel/Makefile         |   1 +
>  arch/riscv/kernel/asm-offsets.c    |   5 +
>  arch/riscv/kernel/hibernate-asm.S  |  77 ++++++
>  arch/riscv/kernel/hibernate.c      | 427 +++++++++++++++++++++++++++++
>  arch/riscv/kernel/suspend.c        |   4 +-
>  arch/riscv/kernel/suspend_entry.S  |  34 +--
>  arch/riscv/mm/pageattr.c           |   8 +
>  10 files changed, 633 insertions(+), 33 deletions(-)
>  create mode 100644 arch/riscv/include/asm/assembler.h
>  create mode 100644 arch/riscv/kernel/hibernate-asm.S
>  create mode 100644 arch/riscv/kernel/hibernate.c
> 
> 
> base-commit: fc89d7fb499b0162e081f434d45e8d1b47e82ece
> --
> 2.34.1

Conor Dooley March 20, 2023, 12:33 p.m. UTC | #2

On Mon, Mar 20, 2023 at 07:20:58AM +0000, JeeHeng Sia wrote:
> Hi,
> 
> I understand that you must be extremely busy, but I was wondering if
> there are any comments for the below v6 patch series?

> > -----Original Message-----
> > Sent: Tuesday, March 14, 2023 1:03 PM

It's not even been a week chief, relax :)