| Message ID | 20230316111335.66915-2-mika.kahola@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm/i915/mtl: Add C10 and C20 phy support | expand |
On Thu, Mar 16, 2023 at 01:13:14PM +0200, Mika Kahola wrote: >From: Clint Taylor <clinton.a.taylor@intel.com> > >Initialize c10 combo phy ports. TODO Type-C ports. > >Cc: Radhakrishna Sripada <radhakrishna.sripada@intel.com> > ^ trailing line here, so it doesn't show up as a git trailer >Signed-off-by: Clint Taylor <clinton.a.taylor@intel.com> As mentioned by RK previously, it doesn't make much sense to have this as patch 1 in this series. The whole argument for having this patch with a TODO like this is: "ok, everything needed for enabling the combo ports, that use c10 phys is ready, we can enable the first 2 ports ahead of having functional TC ports that use C20". This is not it. In this same series we have patches enabling missing parts of c10. And in another series we still have the hdmi/DP initialization sequences. I understand there's a chicken and egg situation and the whole MTL device is under force_probe to avoid bigger problems. However I wish we would go ahead and prepare the patches in an order that made logical sense for whom will be checking the log ~2 years from now. Let's reword this commit message with: Initialization sequences and C10 phy are in place to be able to enable the first 2 ports of MTL. The other ports use C20 phy that still need to be properly added. Enable the first ports for now, keeping a TODO comment about the others. ... and move it after that statement is true. With that: Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com> Lucas De Marchi >--- > drivers/gpu/drm/i915/display/intel_display.c | 6 +++++- > 1 file changed, 5 insertions(+), 1 deletion(-) > >diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c >index 410c84fd905c..1ac05dc68db5 100644 >--- a/drivers/gpu/drm/i915/display/intel_display.c >+++ b/drivers/gpu/drm/i915/display/intel_display.c >@@ -7832,7 +7832,11 @@ static void intel_setup_outputs(struct drm_i915_private *dev_priv) > if (!HAS_DISPLAY(dev_priv)) > return; > >- if (IS_DG2(dev_priv)) { >+ if (IS_METEORLAKE(dev_priv)) { >+ /* TODO: initialize TC ports as well */ >+ intel_ddi_init(dev_priv, PORT_A); >+ intel_ddi_init(dev_priv, PORT_B); >+ } else if (IS_DG2(dev_priv)) { > intel_ddi_init(dev_priv, PORT_A); > intel_ddi_init(dev_priv, PORT_B); > intel_ddi_init(dev_priv, PORT_C); >-- >2.34.1 >
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 410c84fd905c..1ac05dc68db5 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -7832,7 +7832,11 @@ static void intel_setup_outputs(struct drm_i915_private *dev_priv) if (!HAS_DISPLAY(dev_priv)) return; - if (IS_DG2(dev_priv)) { + if (IS_METEORLAKE(dev_priv)) { + /* TODO: initialize TC ports as well */ + intel_ddi_init(dev_priv, PORT_A); + intel_ddi_init(dev_priv, PORT_B); + } else if (IS_DG2(dev_priv)) { intel_ddi_init(dev_priv, PORT_A); intel_ddi_init(dev_priv, PORT_B); intel_ddi_init(dev_priv, PORT_C);