| Message ID | 20230325060828.2662773-6-rppt@kernel.org (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | arch,mm: cleanup Kconfig entries for ARCH_FORCE_MAX_ORDER | expand |
On 2023/3/25 14:08, Mike Rapoport wrote: > From: "Mike Rapoport (IBM)" <rppt@kernel.org> > > It is enough to keep default values for base and huge pages without > letting users to override ARCH_FORCE_MAX_ORDER. > > Drop the prompt to make the option unvisible in *config. > > Acked-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com> > Reviewed-by: Zi Yan <ziy@nvidia.com> > Signed-off-by: Mike Rapoport (IBM) <rppt@kernel.org> > --- > arch/ia64/Kconfig | 3 +-- > 1 file changed, 1 insertion(+), 2 deletions(-) > > diff --git a/arch/ia64/Kconfig b/arch/ia64/Kconfig > index 0d2f41fa56ee..b61437cae162 100644 > --- a/arch/ia64/Kconfig > +++ b/arch/ia64/Kconfig > @@ -202,8 +202,7 @@ config IA64_CYCLONE > If you're unsure, answer N. > > config ARCH_FORCE_MAX_ORDER > - int "MAX_ORDER (10 - 16)" if !HUGETLB_PAGE > - range 10 16 if !HUGETLB_PAGE > + int > default "16" if HUGETLB_PAGE > default "10" > It seems that we could drop the following part? diff --git a/arch/ia64/include/asm/sparsemem.h b/arch/ia64/include/asm/sparsemem.h index a58f8b466d96..18187551b183 100644 --- a/arch/ia64/include/asm/sparsemem.h +++ b/arch/ia64/include/asm/sparsemem.h @@ -11,11 +11,6 @@ #define SECTION_SIZE_BITS (30) #define MAX_PHYSMEM_BITS (50) -#ifdef CONFIG_ARCH_FORCE_MAX_ORDER -#if (CONFIG_ARCH_FORCE_MAX_ORDER + PAGE_SHIFT > SECTION_SIZE_BITS) -#undef SECTION_SIZE_BITS -#define SECTION_SIZE_BITS (CONFIG_ARCH_FORCE_MAX_ORDER + PAGE_SHIFT) -#endif #endif
On Sat, Mar 25, 2023 at 02:38:15PM +0800, Kefeng Wang wrote: > > > On 2023/3/25 14:08, Mike Rapoport wrote: > > From: "Mike Rapoport (IBM)" <rppt@kernel.org> > > > > It is enough to keep default values for base and huge pages without > > letting users to override ARCH_FORCE_MAX_ORDER. > > > > Drop the prompt to make the option unvisible in *config. > > > > Acked-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com> > > Reviewed-by: Zi Yan <ziy@nvidia.com> > > Signed-off-by: Mike Rapoport (IBM) <rppt@kernel.org> > > --- > > arch/ia64/Kconfig | 3 +-- > > 1 file changed, 1 insertion(+), 2 deletions(-) > > > > diff --git a/arch/ia64/Kconfig b/arch/ia64/Kconfig > > index 0d2f41fa56ee..b61437cae162 100644 > > --- a/arch/ia64/Kconfig > > +++ b/arch/ia64/Kconfig > > @@ -202,8 +202,7 @@ config IA64_CYCLONE > > If you're unsure, answer N. > > config ARCH_FORCE_MAX_ORDER > > - int "MAX_ORDER (10 - 16)" if !HUGETLB_PAGE > > - range 10 16 if !HUGETLB_PAGE > > + int > > default "16" if HUGETLB_PAGE > > default "10" > > It seems that we could drop the following part? ia64 can have 64k pages, so with MAX_ORDER==16 we'd need at least 32 bits for section size > diff --git a/arch/ia64/include/asm/sparsemem.h > b/arch/ia64/include/asm/sparsemem.h > index a58f8b466d96..18187551b183 100644 > --- a/arch/ia64/include/asm/sparsemem.h > +++ b/arch/ia64/include/asm/sparsemem.h > @@ -11,11 +11,6 @@ > > #define SECTION_SIZE_BITS (30) > #define MAX_PHYSMEM_BITS (50) > -#ifdef CONFIG_ARCH_FORCE_MAX_ORDER > -#if (CONFIG_ARCH_FORCE_MAX_ORDER + PAGE_SHIFT > SECTION_SIZE_BITS) > -#undef SECTION_SIZE_BITS > -#define SECTION_SIZE_BITS (CONFIG_ARCH_FORCE_MAX_ORDER + PAGE_SHIFT) > -#endif > #endif >
diff --git a/arch/ia64/Kconfig b/arch/ia64/Kconfig index 0d2f41fa56ee..b61437cae162 100644 --- a/arch/ia64/Kconfig +++ b/arch/ia64/Kconfig @@ -202,8 +202,7 @@ config IA64_CYCLONE If you're unsure, answer N. config ARCH_FORCE_MAX_ORDER - int "MAX_ORDER (10 - 16)" if !HUGETLB_PAGE - range 10 16 if !HUGETLB_PAGE + int default "16" if HUGETLB_PAGE default "10"