| Message ID | 20230328101011.185594-2-biju.das.jz@bp.renesas.com (mailing list archive) |
|---|---|
| State | Under Review |
| Delegated to: | Geert Uytterhoeven |
| Headers | show |
| Series | Add RZ/G2L POEG support | expand |
On Tue, Mar 28, 2023 at 12:10 PM Biju Das <biju.das.jz@bp.renesas.com> wrote: > Document renesas,poeg-config optional property. > > The output pins of the general PWM timer (GPT) can be disabled by using > the port output enabling function for the GPT (POEG). The HW supports > following ways to disable the output pins. > > 1) Pin output disable by input level detection of the GTETRG{A..D} pins > 2) Output disable request from the GPT > 3) Pin output disable by user control > > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> This looks good to me, Geert will know the details. Acked-by: Linus Walleij <linus.walleij@linaro.org> Yours, Linus Walleij
Hi Linus, On Fri, Mar 31, 2023 at 11:49 AM Linus Walleij <linus.walleij@linaro.org> wrote: > On Tue, Mar 28, 2023 at 12:10 PM Biju Das <biju.das.jz@bp.renesas.com> wrote: > > Document renesas,poeg-config optional property. > > > > The output pins of the general PWM timer (GPT) can be disabled by using > > the port output enabling function for the GPT (POEG). The HW supports > > following ways to disable the output pins. > > > > 1) Pin output disable by input level detection of the GTETRG{A..D} pins > > 2) Output disable request from the GPT > > 3) Pin output disable by user control > > > > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> > > This looks good to me, Geert will know the details. TBH, I do not ;-) > Acked-by: Linus Walleij <linus.walleij@linaro.org> Thanks! Gr{oetje,eeting}s, Geert
On Tue, 28 Mar 2023 11:10:02 +0100, Biju Das wrote: > Document renesas,poeg-config optional property. > > The output pins of the general PWM timer (GPT) can be disabled by using > the port output enabling function for the GPT (POEG). The HW supports > following ways to disable the output pins. > > 1) Pin output disable by input level detection of the GTETRG{A..D} pins > 2) Output disable request from the GPT > 3) Pin output disable by user control > > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> > --- > v7: > * New patch > Ref: > https://lore.kernel.org/linux-renesas-soc/20230306090014.128732-1-biju.das.jz@bp.renesas.com/T/#m07d2c4661d772a705b5a48fd050b7007b830f3eb > --- > .../bindings/pinctrl/renesas,rzg2l-poeg.yaml | 16 ++++++++++++++++ > 1 file changed, 16 insertions(+) > Acked-by: Rob Herring <robh@kernel.org>
diff --git a/Documentation/devicetree/bindings/pinctrl/renesas,rzg2l-poeg.yaml b/Documentation/devicetree/bindings/pinctrl/renesas,rzg2l-poeg.yaml index ab2d456c93e4..ae027a490206 100644 --- a/Documentation/devicetree/bindings/pinctrl/renesas,rzg2l-poeg.yaml +++ b/Documentation/devicetree/bindings/pinctrl/renesas,rzg2l-poeg.yaml @@ -57,6 +57,21 @@ properties: <2> : POEG group C <3> : POEG group D + renesas,poeg-config: + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [ 1, 2, 4, 6, 8, 10, 12, 14, 16 ] + description: | + POEG Configuration. Valid values are: + <1> : User control + <2> : GPT both output high + <4> : GPT both output low + <6> : GPT both output high + GPT both output low + <8> : GPT dead time error + <10> : GPT both output high + GPT dead time error + <12> : GPT both output low + GPT dead time error + <14> : GPT both output {high, low} + GPT dead time error + <16> : External pin control + required: - compatible - reg @@ -83,4 +98,5 @@ examples: resets = <&cpg R9A07G044_POEG_D_RST>; renesas,poeg-id = <3>; renesas,gpt = <&gpt>; + renesas,poeg-config = <1>; };
Document renesas,poeg-config optional property. The output pins of the general PWM timer (GPT) can be disabled by using the port output enabling function for the GPT (POEG). The HW supports following ways to disable the output pins. 1) Pin output disable by input level detection of the GTETRG{A..D} pins 2) Output disable request from the GPT 3) Pin output disable by user control Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> --- v7: * New patch Ref: https://lore.kernel.org/linux-renesas-soc/20230306090014.128732-1-biju.das.jz@bp.renesas.com/T/#m07d2c4661d772a705b5a48fd050b7007b830f3eb --- .../bindings/pinctrl/renesas,rzg2l-poeg.yaml | 16 ++++++++++++++++ 1 file changed, 16 insertions(+)