@@ -1053,6 +1053,7 @@ static const struct rockchip_domain_info rk3588_pm_domains[] = {
[RK3588_PD_SDIO] = DOMAIN_RK3588("sdio", 0x4, BIT(10), 0, BIT(24), 0x4, BIT(3), BIT(19), false),
[RK3588_PD_USB] = DOMAIN_RK3588("usb", 0x4, BIT(11), 0, BIT(25), 0x4, BIT(4), BIT(20), true),
[RK3588_PD_SDMMC] = DOMAIN_RK3588("sdmmc", 0x4, BIT(13), 0, BIT(26), 0x0, 0, 0, false),
+ [RK3588_PD_CRYPTO] = DOMAIN_RK3588("crypto", 0x4, BIT(14), 0, BIT(27), 0x0, 0, 0, false),
};
@@ -816,6 +816,12 @@ power-domain@RK3588_PD_SDMMC {
pm_qos = <&qos_sdmmc>;
#power-domain-cells = <0>;
};
+ power-domain@RK3588_PD_CRYPTO {
+ reg = <RK3588_PD_CRYPTO>;
+ pm_qos = <&qos_cryptos>,
+ <&qos_cryptons>;
+ #power-domain-cells = <0>;
+ };
};
};
@@ -854,6 +860,16 @@ qos_sdmmc: qos@fdf3d800 {
reg = <0x0 0xfdf3d800 0x0 0x20>;
};
+ qos_cryptos: qos@fdf3d000 {
+ compatible = "rockchip,rk3588-qos", "syscon";
+ reg = <0x0 0xfdf3d000 0x0 0x20>;
+ };
+
+ qos_cryptons: qos@fdf3d200 {
+ compatible = "rockchip,rk3588-qos", "syscon";
+ reg = <0x0 0xfdf3d200 0x0 0x20>;
+ };
+
And in the crypto node:
power-domains = <&power RK3588_PD_CRYPTO>;