| Message ID | 20230405080152.6732-4-ilpo.jarvinen@linux.intel.com (mailing list archive) |
|---|---|
| State | Not Applicable |
| Headers | show |
| Series | Manage register access to control delay during sec update | expand |
On 4/5/23 01:01, Ilpo Järvinen wrote: > Move m10bmc_sys_read() out from the header to prepare it for adding > more code into the function which would make it too large to be a > static inline any more. > > While at it, replace the vague wording in function comment with more > precise statements. > > Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> > --- > drivers/hwmon/intel-m10-bmc-hwmon.c | 1 + For hwmon: Acked-by: Guenter Roeck <linux@roeck-us.net> > drivers/mfd/intel-m10-bmc-core.c | 14 ++++++++++++++ > include/linux/mfd/intel-m10-bmc.h | 17 +---------------- > 3 files changed, 16 insertions(+), 16 deletions(-) > > diff --git a/drivers/hwmon/intel-m10-bmc-hwmon.c b/drivers/hwmon/intel-m10-bmc-hwmon.c > index 2f0323c14bab..92900ce7986b 100644 > --- a/drivers/hwmon/intel-m10-bmc-hwmon.c > +++ b/drivers/hwmon/intel-m10-bmc-hwmon.c > @@ -794,3 +794,4 @@ MODULE_DEVICE_TABLE(platform, intel_m10bmc_hwmon_ids); > MODULE_AUTHOR("Intel Corporation"); > MODULE_DESCRIPTION("Intel MAX 10 BMC hardware monitor"); > MODULE_LICENSE("GPL"); > +MODULE_IMPORT_NS(INTEL_M10_BMC_CORE); > diff --git a/drivers/mfd/intel-m10-bmc-core.c b/drivers/mfd/intel-m10-bmc-core.c > index 879d98b9b14d..4a1bfe135293 100644 > --- a/drivers/mfd/intel-m10-bmc-core.c > +++ b/drivers/mfd/intel-m10-bmc-core.c > @@ -12,6 +12,20 @@ > #include <linux/mfd/intel-m10-bmc.h> > #include <linux/module.h> > > +/* > + * This function helps to simplify the accessing of the system registers. > + * > + * The base of the system registers is configured through the struct > + * csr_map. > + */ > +int m10bmc_sys_read(struct intel_m10bmc *m10bmc, unsigned int offset, unsigned int *val) > +{ > + const struct m10bmc_csr_map *csr_map = m10bmc->info->csr_map; > + > + return m10bmc_raw_read(m10bmc, csr_map->base + offset, val); > +} > +EXPORT_SYMBOL_NS_GPL(m10bmc_sys_read, INTEL_M10_BMC_CORE); > + > int m10bmc_sys_update_bits(struct intel_m10bmc *m10bmc, unsigned int offset, > unsigned int msk, unsigned int val) > { > diff --git a/include/linux/mfd/intel-m10-bmc.h b/include/linux/mfd/intel-m10-bmc.h > index 5418f7279ed0..252644fa61be 100644 > --- a/include/linux/mfd/intel-m10-bmc.h > +++ b/include/linux/mfd/intel-m10-bmc.h > @@ -267,22 +267,7 @@ m10bmc_raw_read(struct intel_m10bmc *m10bmc, unsigned int addr, > return ret; > } > > -/* > - * The base of the system registers could be configured by HW developers, and > - * in HW SPEC, the base is not added to the addresses of the system registers. > - * > - * This function helps to simplify the accessing of the system registers. And if > - * the base is reconfigured in HW, SW developers could simply change the > - * csr_map's base accordingly. > - */ > -static inline int m10bmc_sys_read(struct intel_m10bmc *m10bmc, unsigned int offset, > - unsigned int *val) > -{ > - const struct m10bmc_csr_map *csr_map = m10bmc->info->csr_map; > - > - return m10bmc_raw_read(m10bmc, csr_map->base + offset, val); > -} > - > +int m10bmc_sys_read(struct intel_m10bmc *m10bmc, unsigned int offset, unsigned int *val); > int m10bmc_sys_update_bits(struct intel_m10bmc *m10bmc, unsigned int offset, > unsigned int msk, unsigned int val); >
On 4/5/23 01:01, Ilpo Järvinen wrote: > Move m10bmc_sys_read() out from the header to prepare it for adding > more code into the function which would make it too large to be a > static inline any more. > > While at it, replace the vague wording in function comment with more > precise statements. Reviewed-by: Russ Weight <russell.h.weight@intel.com> > > Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> > --- > drivers/hwmon/intel-m10-bmc-hwmon.c | 1 + > drivers/mfd/intel-m10-bmc-core.c | 14 ++++++++++++++ > include/linux/mfd/intel-m10-bmc.h | 17 +---------------- > 3 files changed, 16 insertions(+), 16 deletions(-) > > diff --git a/drivers/hwmon/intel-m10-bmc-hwmon.c b/drivers/hwmon/intel-m10-bmc-hwmon.c > index 2f0323c14bab..92900ce7986b 100644 > --- a/drivers/hwmon/intel-m10-bmc-hwmon.c > +++ b/drivers/hwmon/intel-m10-bmc-hwmon.c > @@ -794,3 +794,4 @@ MODULE_DEVICE_TABLE(platform, intel_m10bmc_hwmon_ids); > MODULE_AUTHOR("Intel Corporation"); > MODULE_DESCRIPTION("Intel MAX 10 BMC hardware monitor"); > MODULE_LICENSE("GPL"); > +MODULE_IMPORT_NS(INTEL_M10_BMC_CORE); > diff --git a/drivers/mfd/intel-m10-bmc-core.c b/drivers/mfd/intel-m10-bmc-core.c > index 879d98b9b14d..4a1bfe135293 100644 > --- a/drivers/mfd/intel-m10-bmc-core.c > +++ b/drivers/mfd/intel-m10-bmc-core.c > @@ -12,6 +12,20 @@ > #include <linux/mfd/intel-m10-bmc.h> > #include <linux/module.h> > > +/* > + * This function helps to simplify the accessing of the system registers. > + * > + * The base of the system registers is configured through the struct > + * csr_map. > + */ > +int m10bmc_sys_read(struct intel_m10bmc *m10bmc, unsigned int offset, unsigned int *val) > +{ > + const struct m10bmc_csr_map *csr_map = m10bmc->info->csr_map; > + > + return m10bmc_raw_read(m10bmc, csr_map->base + offset, val); > +} > +EXPORT_SYMBOL_NS_GPL(m10bmc_sys_read, INTEL_M10_BMC_CORE); > + > int m10bmc_sys_update_bits(struct intel_m10bmc *m10bmc, unsigned int offset, > unsigned int msk, unsigned int val) > { > diff --git a/include/linux/mfd/intel-m10-bmc.h b/include/linux/mfd/intel-m10-bmc.h > index 5418f7279ed0..252644fa61be 100644 > --- a/include/linux/mfd/intel-m10-bmc.h > +++ b/include/linux/mfd/intel-m10-bmc.h > @@ -267,22 +267,7 @@ m10bmc_raw_read(struct intel_m10bmc *m10bmc, unsigned int addr, > return ret; > } > > -/* > - * The base of the system registers could be configured by HW developers, and > - * in HW SPEC, the base is not added to the addresses of the system registers. > - * > - * This function helps to simplify the accessing of the system registers. And if > - * the base is reconfigured in HW, SW developers could simply change the > - * csr_map's base accordingly. > - */ > -static inline int m10bmc_sys_read(struct intel_m10bmc *m10bmc, unsigned int offset, > - unsigned int *val) > -{ > - const struct m10bmc_csr_map *csr_map = m10bmc->info->csr_map; > - > - return m10bmc_raw_read(m10bmc, csr_map->base + offset, val); > -} > - > +int m10bmc_sys_read(struct intel_m10bmc *m10bmc, unsigned int offset, unsigned int *val); > int m10bmc_sys_update_bits(struct intel_m10bmc *m10bmc, unsigned int offset, > unsigned int msk, unsigned int val); >
diff --git a/drivers/hwmon/intel-m10-bmc-hwmon.c b/drivers/hwmon/intel-m10-bmc-hwmon.c index 2f0323c14bab..92900ce7986b 100644 --- a/drivers/hwmon/intel-m10-bmc-hwmon.c +++ b/drivers/hwmon/intel-m10-bmc-hwmon.c @@ -794,3 +794,4 @@ MODULE_DEVICE_TABLE(platform, intel_m10bmc_hwmon_ids); MODULE_AUTHOR("Intel Corporation"); MODULE_DESCRIPTION("Intel MAX 10 BMC hardware monitor"); MODULE_LICENSE("GPL"); +MODULE_IMPORT_NS(INTEL_M10_BMC_CORE); diff --git a/drivers/mfd/intel-m10-bmc-core.c b/drivers/mfd/intel-m10-bmc-core.c index 879d98b9b14d..4a1bfe135293 100644 --- a/drivers/mfd/intel-m10-bmc-core.c +++ b/drivers/mfd/intel-m10-bmc-core.c @@ -12,6 +12,20 @@ #include <linux/mfd/intel-m10-bmc.h> #include <linux/module.h> +/* + * This function helps to simplify the accessing of the system registers. + * + * The base of the system registers is configured through the struct + * csr_map. + */ +int m10bmc_sys_read(struct intel_m10bmc *m10bmc, unsigned int offset, unsigned int *val) +{ + const struct m10bmc_csr_map *csr_map = m10bmc->info->csr_map; + + return m10bmc_raw_read(m10bmc, csr_map->base + offset, val); +} +EXPORT_SYMBOL_NS_GPL(m10bmc_sys_read, INTEL_M10_BMC_CORE); + int m10bmc_sys_update_bits(struct intel_m10bmc *m10bmc, unsigned int offset, unsigned int msk, unsigned int val) { diff --git a/include/linux/mfd/intel-m10-bmc.h b/include/linux/mfd/intel-m10-bmc.h index 5418f7279ed0..252644fa61be 100644 --- a/include/linux/mfd/intel-m10-bmc.h +++ b/include/linux/mfd/intel-m10-bmc.h @@ -267,22 +267,7 @@ m10bmc_raw_read(struct intel_m10bmc *m10bmc, unsigned int addr, return ret; } -/* - * The base of the system registers could be configured by HW developers, and - * in HW SPEC, the base is not added to the addresses of the system registers. - * - * This function helps to simplify the accessing of the system registers. And if - * the base is reconfigured in HW, SW developers could simply change the - * csr_map's base accordingly. - */ -static inline int m10bmc_sys_read(struct intel_m10bmc *m10bmc, unsigned int offset, - unsigned int *val) -{ - const struct m10bmc_csr_map *csr_map = m10bmc->info->csr_map; - - return m10bmc_raw_read(m10bmc, csr_map->base + offset, val); -} - +int m10bmc_sys_read(struct intel_m10bmc *m10bmc, unsigned int offset, unsigned int *val); int m10bmc_sys_update_bits(struct intel_m10bmc *m10bmc, unsigned int offset, unsigned int msk, unsigned int val);
Move m10bmc_sys_read() out from the header to prepare it for adding more code into the function which would make it too large to be a static inline any more. While at it, replace the vague wording in function comment with more precise statements. Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> --- drivers/hwmon/intel-m10-bmc-hwmon.c | 1 + drivers/mfd/intel-m10-bmc-core.c | 14 ++++++++++++++ include/linux/mfd/intel-m10-bmc.h | 17 +---------------- 3 files changed, 16 insertions(+), 16 deletions(-)