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[1/1] EDAC/i10nm: Add Intel Sierra Forest server support

Message ID 20230410131531.11914-1-qiuxu.zhuo@intel.com (mailing list archive)
State New, archived
Headers show
Series [1/1] EDAC/i10nm: Add Intel Sierra Forest server support | expand

Commit Message

Zhuo, Qiuxu April 10, 2023, 1:15 p.m. UTC 
The Sierra Forest CPU model uses similar memory controller registers as
Granite Rapids server. Add Sierra Forest CPU model ID for EDAC support.

Tested-by: Li Zhang <li4.zhang@intel.com>
Signed-off-by: Qiuxu Zhuo <qiuxu.zhuo@intel.com>
---
 drivers/edac/i10nm_base.c | 1 +
 1 file changed, 1 insertion(+)

Comments

Tony Luck April 10, 2023, 4:41 p.m. UTC | #1 
> The Sierra Forest CPU model uses similar memory controller registers as
> Granite Rapids server. Add Sierra Forest CPU model ID for EDAC support.

Applied to edac-drivers branch of ras tree and merged into edac-for-next.. Thanks.

-Tony
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Patch

diff --git a/drivers/edac/i10nm_base.c b/drivers/edac/i10nm_base.c
index 0a4691792801..a897b6aff368 100644
--- a/drivers/edac/i10nm_base.c
+++ b/drivers/edac/i10nm_base.c
@@ -906,6 +906,7 @@  static const struct x86_cpu_id i10nm_cpuids[] = {
 	X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(SAPPHIRERAPIDS_X,	X86_STEPPINGS(0x0, 0xf), &spr_cfg),
 	X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(EMERALDRAPIDS_X,	X86_STEPPINGS(0x0, 0xf), &spr_cfg),
 	X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(GRANITERAPIDS_X,	X86_STEPPINGS(0x0, 0xf), &gnr_cfg),
+	X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(SIERRAFOREST_X,	X86_STEPPINGS(0x0, 0xf), &gnr_cfg),
 	{}
 };
 MODULE_DEVICE_TABLE(x86cpu, i10nm_cpuids);