| Message ID | ffc3e4e7-b2ea-1a56-4fff-6554ad3775c0@gmail.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [v2] pwm: meson: fix axg ao mux parents | expand |
On Sun, Apr 9, 2023 at 5:15 PM Heiner Kallweit <hkallweit1@gmail.com> wrote: > > This fix is basically the same as 9bce02ef0dfa ("pwm: meson: Fix the > G12A AO clock parents order"). Vendor driver referenced there has > xtal as first parent also for axg ao. In addition fix the name > of the aoclk81 clock. Apparently name aoclk81 as used by the vendor > driver was changed when mainlining the axg clock driver. > > Fixes: bccaa3f917c9 ("pwm: meson: Add clock source configuration for Meson-AXG") > Cc: stable@vger.kernel.org > > Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
On Sun, Apr 09, 2023 at 05:15:52PM +0200, Heiner Kallweit wrote: > This fix is basically the same as 9bce02ef0dfa ("pwm: meson: Fix the > G12A AO clock parents order"). Vendor driver referenced there has > xtal as first parent also for axg ao. In addition fix the name > of the aoclk81 clock. Apparently name aoclk81 as used by the vendor > driver was changed when mainlining the axg clock driver. > > Fixes: bccaa3f917c9 ("pwm: meson: Add clock source configuration for Meson-AXG") > Cc: stable@vger.kernel.org > > Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> > --- > drivers/pwm/pwm-meson.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) This looks like it supersedes this one: https://patchwork.ozlabs.org/project/linux-pwm/patch/e7a95baf-5f9d-be56-93dc-82ca83b69c7a@gmail.com/ I don't see any discussion on on that one, nor does v2 here have a changelog and the commit subject is slightly changed, so you're making it more difficult than necessary to correlate the two. Anyway, since both patches conflict, I've picked up v2. Let me know if that's not what you intended. Thierry > > diff --git a/drivers/pwm/pwm-meson.c b/drivers/pwm/pwm-meson.c > index b5c746fab..0fe0400c2 100644 > --- a/drivers/pwm/pwm-meson.c > +++ b/drivers/pwm/pwm-meson.c > @@ -381,7 +381,7 @@ static const struct meson_pwm_data pwm_axg_ee_data = { > }; > > static const char * const pwm_axg_ao_parent_names[] = { > - "aoclk81", "xtal", "fclk_div4", "fclk_div5" > + "xtal", "axg_ao_clk81", "fclk_div4", "fclk_div5" > }; > > static const struct meson_pwm_data pwm_axg_ao_data = { > -- > 2.40.0 >
diff --git a/drivers/pwm/pwm-meson.c b/drivers/pwm/pwm-meson.c index b5c746fab..0fe0400c2 100644 --- a/drivers/pwm/pwm-meson.c +++ b/drivers/pwm/pwm-meson.c @@ -381,7 +381,7 @@ static const struct meson_pwm_data pwm_axg_ee_data = { }; static const char * const pwm_axg_ao_parent_names[] = { - "aoclk81", "xtal", "fclk_div4", "fclk_div5" + "xtal", "axg_ao_clk81", "fclk_div4", "fclk_div5" }; static const struct meson_pwm_data pwm_axg_ao_data = {
This fix is basically the same as 9bce02ef0dfa ("pwm: meson: Fix the G12A AO clock parents order"). Vendor driver referenced there has xtal as first parent also for axg ao. In addition fix the name of the aoclk81 clock. Apparently name aoclk81 as used by the vendor driver was changed when mainlining the axg clock driver. Fixes: bccaa3f917c9 ("pwm: meson: Add clock source configuration for Meson-AXG") Cc: stable@vger.kernel.org Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> --- drivers/pwm/pwm-meson.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)