Message ID | 20230412224925.1309815-8-radhakrishna.sripada@intel.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | drm/i915/mtl: Add Support for C10 phy | expand |
On Wed, Apr 12, 2023 at 03:49:23PM -0700, Radhakrishna Sripada wrote: Could you move this to the end of the patchset? > From: Clint Taylor <clinton.a.taylor@intel.com> > > Initialization sequences and C10 phy are in place to be able to enable > the first 2 ports of MTL. The other ports use C20 phy that still need > to be properly added. Enable the first ports for now, keeping a TODO > comment about the others. > > Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com> > Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com> > Signed-off-by: Clint Taylor <clinton.a.taylor@intel.com> > --- > drivers/gpu/drm/i915/display/intel_display.c | 6 +++++- > 1 file changed, 5 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c > index 27b47680573a..1fec49c5d23a 100644 > --- a/drivers/gpu/drm/i915/display/intel_display.c > +++ b/drivers/gpu/drm/i915/display/intel_display.c > @@ -7791,7 +7791,11 @@ static void intel_setup_outputs(struct drm_i915_private *dev_priv) > if (!HAS_DISPLAY(dev_priv)) > return; > > - if (IS_DG2(dev_priv)) { > + if (IS_METEORLAKE(dev_priv)) { > + /* TODO: initialize TC ports as well */ > + intel_ddi_init(dev_priv, PORT_A); > + intel_ddi_init(dev_priv, PORT_B); > + } else if (IS_DG2(dev_priv)) { > intel_ddi_init(dev_priv, PORT_A); > intel_ddi_init(dev_priv, PORT_B); > intel_ddi_init(dev_priv, PORT_C); > -- > 2.34.1 >
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 27b47680573a..1fec49c5d23a 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -7791,7 +7791,11 @@ static void intel_setup_outputs(struct drm_i915_private *dev_priv) if (!HAS_DISPLAY(dev_priv)) return; - if (IS_DG2(dev_priv)) { + if (IS_METEORLAKE(dev_priv)) { + /* TODO: initialize TC ports as well */ + intel_ddi_init(dev_priv, PORT_A); + intel_ddi_init(dev_priv, PORT_B); + } else if (IS_DG2(dev_priv)) { intel_ddi_init(dev_priv, PORT_A); intel_ddi_init(dev_priv, PORT_B); intel_ddi_init(dev_priv, PORT_C);