Message ID | 20230410184526.15990-4-blarson@amd.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | Support AMD Pensando Elba SoC | expand |
On Mon, Apr 10, 2023 at 11:45:14AM -0700, Brad Larson wrote: > Document the cadence qspi controller compatible for AMD Pensando > Elba SoC boards. The Elba qspi fifo size is 1024. This does not apply against current code, please check and resend.
diff --git a/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml b/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml index 5c01db128be0..6e67de9da293 100644 --- a/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml +++ b/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml @@ -20,11 +20,28 @@ allOf: required: - power-domains + - if: + properties: + compatible: + contains: + const: amd,pensando-elba-qspi + then: + properties: + cdns,fifo-depth: + enum: [ 128, 256, 1024 ] + default: 1024 + else: + properties: + cdns,fifo-depth: + enum: [ 128, 256 ] + default: 128 + properties: compatible: oneOf: - items: - enum: + - amd,pensando-elba-qspi - ti,k2g-qspi - ti,am654-ospi - intel,lgm-qspi @@ -48,8 +65,6 @@ properties: description: Size of the data FIFO in words. $ref: /schemas/types.yaml#/definitions/uint32 - enum: [ 128, 256 ] - default: 128 cdns,fifo-width: $ref: /schemas/types.yaml#/definitions/uint32