Message ID | 20230421-clk-v2-2-74c6cc2214d1@outlook.com (mailing list archive) |
---|---|
State | Changes Requested, archived |
Headers | show |
Series | clk: fix corner case of clk_mux_determine_rate_flags() | expand |
Quoting Yang Xiwen via B4 Relay (2023-04-25 00:46:40) > From: Yang Xiwen <forbidden405@outlook.com> > > Add a missing test case for determine_rate implemented by mux. It tests > the behavior of determine_rate when requesting a rate that none of the > parents could give. > > Signed-off-by: Yang Xiwen <forbidden405@outlook.com> > --- > drivers/clk/clk_test.c | 9 +++++++++ > 1 file changed, 9 insertions(+) > > diff --git a/drivers/clk/clk_test.c b/drivers/clk/clk_test.c > index f9a5c2964c65d..9b1c90de90454 100644 > --- a/drivers/clk/clk_test.c > +++ b/drivers/clk/clk_test.c > @@ -2215,6 +2215,15 @@ static void clk_leaf_mux_set_rate_parent_determine_rate(struct kunit *test) > KUNIT_EXPECT_EQ(test, req.best_parent_rate, DUMMY_CLOCK_RATE_2); > KUNIT_EXPECT_PTR_EQ(test, req.best_parent_hw, &ctx->mux_ctx.hw); > > + // Test a non-existant rate which none of the parents could give > + clk_hw_init_rate_request(hw, &req, DUMMY_CLOCK_INIT_RATE); > + > + ret = __clk_determine_rate(hw, &req); > + KUNIT_ASSERT_EQ(test, ret, 0); > + > + KUNIT_EXPECT_EQ(test, req.rate, DUMMY_CLOCK_RATE_1); > + KUNIT_EXPECT_EQ(test, req.best_parent_rate, DUMMY_CLOCK_RATE_1); > + KUNIT_EXPECT_PTR_EQ(test, req.best_parent_hw, &ctx->mux_ctx.hw); Please make an entire test case instead of modifying an existing test case.
diff --git a/drivers/clk/clk_test.c b/drivers/clk/clk_test.c index f9a5c2964c65d..9b1c90de90454 100644 --- a/drivers/clk/clk_test.c +++ b/drivers/clk/clk_test.c @@ -2215,6 +2215,15 @@ static void clk_leaf_mux_set_rate_parent_determine_rate(struct kunit *test) KUNIT_EXPECT_EQ(test, req.best_parent_rate, DUMMY_CLOCK_RATE_2); KUNIT_EXPECT_PTR_EQ(test, req.best_parent_hw, &ctx->mux_ctx.hw); + // Test a non-existant rate which none of the parents could give + clk_hw_init_rate_request(hw, &req, DUMMY_CLOCK_INIT_RATE); + + ret = __clk_determine_rate(hw, &req); + KUNIT_ASSERT_EQ(test, ret, 0); + + KUNIT_EXPECT_EQ(test, req.rate, DUMMY_CLOCK_RATE_1); + KUNIT_EXPECT_EQ(test, req.best_parent_rate, DUMMY_CLOCK_RATE_1); + KUNIT_EXPECT_PTR_EQ(test, req.best_parent_hw, &ctx->mux_ctx.hw); clk_put(clk); }