diff mbox series

[3/3] target/openrisc: Setup FPU for detecting tininess before rounding

Message ID 20230502185731.3543420-4-shorne@gmail.com (mailing list archive)
State New, archived
Headers show
Series OpenRISC updates for user space FPU | expand

Commit Message

Stafford Horne May 2, 2023, 6:57 p.m. UTC
OpenRISC defines tininess to be detected before rounding.  Setup qemu to
obey this.

Signed-off-by: Stafford Horne <shorne@gmail.com>
---
 target/openrisc/cpu.c | 5 +++++
 1 file changed, 5 insertions(+)

Comments

Richard Henderson May 3, 2023, 7:37 a.m. UTC | #1
On 5/2/23 19:57, Stafford Horne wrote:
> OpenRISC defines tininess to be detected before rounding.  Setup qemu to
> obey this.
> 
> Signed-off-by: Stafford Horne <shorne@gmail.com>
> ---
>   target/openrisc/cpu.c | 5 +++++
>   1 file changed, 5 insertions(+)
> 
> diff --git a/target/openrisc/cpu.c b/target/openrisc/cpu.c
> index 0ce4f796fa..cdbff26fb5 100644
> --- a/target/openrisc/cpu.c
> +++ b/target/openrisc/cpu.c
> @@ -22,6 +22,7 @@
>   #include "qemu/qemu-print.h"
>   #include "cpu.h"
>   #include "exec/exec-all.h"
> +#include "fpu/softfloat-helpers.h"
>   #include "tcg/tcg.h"
>   
>   static void openrisc_cpu_set_pc(CPUState *cs, vaddr value)
> @@ -90,6 +91,10 @@ static void openrisc_cpu_reset_hold(Object *obj)
>       s->exception_index = -1;
>       cpu_set_fpcsr(&cpu->env, 0);
>   
> +    set_default_nan_mode(1, &cpu->env.fp_status);
> +    set_float_detect_tininess(float_tininess_before_rounding,
> +                              &cpu->env.fp_status);

You don't mention the nan change in the commit message.


r~
Stafford Horne May 3, 2023, 9:14 a.m. UTC | #2
On Wed, May 03, 2023 at 08:37:31AM +0100, Richard Henderson wrote:
> On 5/2/23 19:57, Stafford Horne wrote:
> > OpenRISC defines tininess to be detected before rounding.  Setup qemu to
> > obey this.
> > 
> > Signed-off-by: Stafford Horne <shorne@gmail.com>
> > ---
> >   target/openrisc/cpu.c | 5 +++++
> >   1 file changed, 5 insertions(+)
> > 
> > diff --git a/target/openrisc/cpu.c b/target/openrisc/cpu.c
> > index 0ce4f796fa..cdbff26fb5 100644
> > --- a/target/openrisc/cpu.c
> > +++ b/target/openrisc/cpu.c
> > @@ -22,6 +22,7 @@
> >   #include "qemu/qemu-print.h"
> >   #include "cpu.h"
> >   #include "exec/exec-all.h"
> > +#include "fpu/softfloat-helpers.h"
> >   #include "tcg/tcg.h"
> >   static void openrisc_cpu_set_pc(CPUState *cs, vaddr value)
> > @@ -90,6 +91,10 @@ static void openrisc_cpu_reset_hold(Object *obj)
> >       s->exception_index = -1;
> >       cpu_set_fpcsr(&cpu->env, 0);
> > +    set_default_nan_mode(1, &cpu->env.fp_status);
> > +    set_float_detect_tininess(float_tininess_before_rounding,
> > +                              &cpu->env.fp_status);
> 
> You don't mention the nan change in the commit message.

Right, and I am not sure I need it.  Let me remove it and run tests again.  I
was just adding it as a few other architectures did who set
float_tininess_before_rounding.

Will clean this up.
Richard Henderson May 3, 2023, 9:41 a.m. UTC | #3
On 5/3/23 10:14, Stafford Horne wrote:
>>> +    set_default_nan_mode(1, &cpu->env.fp_status);
>>> +    set_float_detect_tininess(float_tininess_before_rounding,
>>> +                              &cpu->env.fp_status);
>>
>> You don't mention the nan change in the commit message.
> 
> Right, and I am not sure I need it.  Let me remove it and run tests again.  I
> was just adding it as a few other architectures did who set
> float_tininess_before_rounding.

What that does is *not* propagate NaN payloads from (some) input to the output.  This is 
certainly true of RISC-V, which specifies this in their architecture manual.  OpenRISC 
does not specify any NaN behaviour at all.

It's not a bad choice, really, and it almost certainly simplifies the design of the FPU, 
as you can do NaN propagation and silencing in one step.


r~
Stafford Horne May 3, 2023, 4:31 p.m. UTC | #4
On Wed, May 03, 2023 at 10:41:42AM +0100, Richard Henderson wrote:
> On 5/3/23 10:14, Stafford Horne wrote:
> > > > +    set_default_nan_mode(1, &cpu->env.fp_status);
> > > > +    set_float_detect_tininess(float_tininess_before_rounding,
> > > > +                              &cpu->env.fp_status);
> > > 
> > > You don't mention the nan change in the commit message.
> > 
> > Right, and I am not sure I need it.  Let me remove it and run tests again.  I
> > was just adding it as a few other architectures did who set
> > float_tininess_before_rounding.
> 
> What that does is *not* propagate NaN payloads from (some) input to the
> output.  This is certainly true of RISC-V, which specifies this in their
> architecture manual.  OpenRISC does not specify any NaN behaviour at all.

Thanks, that is what I also gathered from reading up on it.

> It's not a bad choice, really, and it almost certainly simplifies the design
> of the FPU, as you can do NaN propagation and silencing in one step.

Right, it makes sense to optimize.  It doesn't look like any of our FPU
implementation do that at the moment.

I will check with bandvig who implemented the FPU to understand his thought on
this.  It at least deserves to be discussed how nan payload is to be handled in
the architecture spec.

-Stafford
diff mbox series

Patch

diff --git a/target/openrisc/cpu.c b/target/openrisc/cpu.c
index 0ce4f796fa..cdbff26fb5 100644
--- a/target/openrisc/cpu.c
+++ b/target/openrisc/cpu.c
@@ -22,6 +22,7 @@ 
 #include "qemu/qemu-print.h"
 #include "cpu.h"
 #include "exec/exec-all.h"
+#include "fpu/softfloat-helpers.h"
 #include "tcg/tcg.h"
 
 static void openrisc_cpu_set_pc(CPUState *cs, vaddr value)
@@ -90,6 +91,10 @@  static void openrisc_cpu_reset_hold(Object *obj)
     s->exception_index = -1;
     cpu_set_fpcsr(&cpu->env, 0);
 
+    set_default_nan_mode(1, &cpu->env.fp_status);
+    set_float_detect_tininess(float_tininess_before_rounding,
+                              &cpu->env.fp_status);
+
 #ifndef CONFIG_USER_ONLY
     cpu->env.picmr = 0x00000000;
     cpu->env.picsr = 0x00000000;