| Message ID | 1683756453-22050-3-git-send-email-quic_khsieh@quicinc.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | add DSC 1.2 dpu supports | expand |
On 11/05/2023 01:07, Kuogee Hsieh wrote: > DPU < 7.0.0 requires the PINGPONG block to be involved during > DSC setting up. Since DPU >= 7.0.0, enabling and starting the DSC > encoder engine moved to INTF with the help of the flush mechanism. Nit: was moved. > Add a DPU_PINGPONG_DSC feature bit to restrict the availability of > dpu_hw_pp_setup_dsc() and dpu_hw_pp_dsc_{enable,disable}() on the > PINGPONG block to DPU < 7.0.0 hardware, as the registers are not > available [in the PINGPONG block] on DPU 7.0.0 and higher anymore. this looks good > Existing call-sites to these callbacks already skip calling into > them if the function pointer is NULL. This is more relevant for patch 3 commit message. > Add DPU_PINGPONG_DSC feature > bit to all chipset with DPU < 7.0.0. This is incorrect, as we do not change the catalog in this patch. > > changes in v6: > -- split patches and rearrange to keep catalog related files at this patch > > Signed-off-by: Kuogee Hsieh <quic_khsieh@quicinc.com> > --- > drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 6 +++--- > drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 4 +++- > 2 files changed, 6 insertions(+), 4 deletions(-) > > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c > index 82b58c6..78e4bf6 100644 > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c > @@ -76,13 +76,13 @@ > (BIT(DPU_DIM_LAYER) | BIT(DPU_MIXER_COMBINED_ALPHA)) > > #define PINGPONG_SDM845_MASK \ > - (BIT(DPU_PINGPONG_DITHER) | BIT(DPU_PINGPONG_TE)) > + (BIT(DPU_PINGPONG_DITHER) | BIT(DPU_PINGPONG_TE) | BIT(DPU_PINGPONG_DSC)) > > #define PINGPONG_SDM845_TE2_MASK \ > - (PINGPONG_SDM845_MASK | BIT(DPU_PINGPONG_TE2)) > + (PINGPONG_SDM845_MASK | BIT(DPU_PINGPONG_TE2) | BIT(DPU_PINGPONG_DSC)) > > #define PINGPONG_SM8150_MASK \ > - (BIT(DPU_PINGPONG_DITHER)) > + (BIT(DPU_PINGPONG_DITHER) | BIT(DPU_PINGPONG_DSC)) > > #define CTL_SC7280_MASK \ > (BIT(DPU_CTL_ACTIVE_CFG) | \ > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h > index 6ee48f0..dc0a4da 100644 > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h > @@ -144,7 +144,8 @@ enum { > * @DPU_PINGPONG_TE2 Additional tear check block for split pipes > * @DPU_PINGPONG_SPLIT PP block supports split fifo > * @DPU_PINGPONG_SLAVE PP block is a suitable slave for split fifo > - * @DPU_PINGPONG_DITHER, Dither blocks > + * @DPU_PINGPONG_DITHER Dither blocks > + * @DPU_PINGPONG_DSC PP ops functions required for DSC > * @DPU_PINGPONG_MAX > */ > enum { > @@ -153,6 +154,7 @@ enum { > DPU_PINGPONG_SPLIT, > DPU_PINGPONG_SLAVE, > DPU_PINGPONG_DITHER, > + DPU_PINGPONG_DSC, > DPU_PINGPONG_MAX > }; >
On 5/10/2023 9:29 PM, Dmitry Baryshkov wrote: > On 11/05/2023 01:07, Kuogee Hsieh wrote: >> DPU < 7.0.0 requires the PINGPONG block to be involved during >> DSC setting up. Since DPU >= 7.0.0, enabling and starting the DSC >> encoder engine moved to INTF with the help of the flush mechanism. > > Nit: was moved. > >> Add a DPU_PINGPONG_DSC feature bit to restrict the availability of >> dpu_hw_pp_setup_dsc() and dpu_hw_pp_dsc_{enable,disable}() on the >> PINGPONG block to DPU < 7.0.0 hardware, as the registers are not >> available [in the PINGPONG block] on DPU 7.0.0 and higher anymore. > > this looks good > >> Existing call-sites to these callbacks already skip calling into >> them if the function pointer is NULL. > > This is more relevant for patch 3 commit message. > >> Add DPU_PINGPONG_DSC feature >> bit to all chipset with DPU < 7.0.0. > > This is incorrect, as we do not change the catalog in this patch. > Sorry but why not? The changes done to dpu_hw_catalog.c do exactly that. >> >> changes in v6: >> -- split patches and rearrange to keep catalog related files at this >> patch >> >> Signed-off-by: Kuogee Hsieh <quic_khsieh@quicinc.com> >> --- >> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 6 +++--- >> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 4 +++- >> 2 files changed, 6 insertions(+), 4 deletions(-) >> >> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c >> b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c >> index 82b58c6..78e4bf6 100644 >> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c >> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c >> @@ -76,13 +76,13 @@ >> (BIT(DPU_DIM_LAYER) | BIT(DPU_MIXER_COMBINED_ALPHA)) >> #define PINGPONG_SDM845_MASK \ >> - (BIT(DPU_PINGPONG_DITHER) | BIT(DPU_PINGPONG_TE)) >> + (BIT(DPU_PINGPONG_DITHER) | BIT(DPU_PINGPONG_TE) | >> BIT(DPU_PINGPONG_DSC)) >> #define PINGPONG_SDM845_TE2_MASK \ >> - (PINGPONG_SDM845_MASK | BIT(DPU_PINGPONG_TE2)) >> + (PINGPONG_SDM845_MASK | BIT(DPU_PINGPONG_TE2) | >> BIT(DPU_PINGPONG_DSC)) >> #define PINGPONG_SM8150_MASK \ >> - (BIT(DPU_PINGPONG_DITHER)) >> + (BIT(DPU_PINGPONG_DITHER) | BIT(DPU_PINGPONG_DSC)) >> #define CTL_SC7280_MASK \ >> (BIT(DPU_CTL_ACTIVE_CFG) | \ >> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h >> b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h >> index 6ee48f0..dc0a4da 100644 >> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h >> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h >> @@ -144,7 +144,8 @@ enum { >> * @DPU_PINGPONG_TE2 Additional tear check block for split pipes >> * @DPU_PINGPONG_SPLIT PP block supports split fifo >> * @DPU_PINGPONG_SLAVE PP block is a suitable slave for split fifo >> - * @DPU_PINGPONG_DITHER, Dither blocks >> + * @DPU_PINGPONG_DITHER Dither blocks >> + * @DPU_PINGPONG_DSC PP ops functions required for DSC >> * @DPU_PINGPONG_MAX >> */ >> enum { >> @@ -153,6 +154,7 @@ enum { >> DPU_PINGPONG_SPLIT, >> DPU_PINGPONG_SLAVE, >> DPU_PINGPONG_DITHER, >> + DPU_PINGPONG_DSC, >> DPU_PINGPONG_MAX >> }; >
On 11/05/2023 07:38, Abhinav Kumar wrote: > > > On 5/10/2023 9:29 PM, Dmitry Baryshkov wrote: >> On 11/05/2023 01:07, Kuogee Hsieh wrote: >>> DPU < 7.0.0 requires the PINGPONG block to be involved during >>> DSC setting up. Since DPU >= 7.0.0, enabling and starting the DSC >>> encoder engine moved to INTF with the help of the flush mechanism. >> >> Nit: was moved. >> >>> Add a DPU_PINGPONG_DSC feature bit to restrict the availability of >>> dpu_hw_pp_setup_dsc() and dpu_hw_pp_dsc_{enable,disable}() on the >>> PINGPONG block to DPU < 7.0.0 hardware, as the registers are not >>> available [in the PINGPONG block] on DPU 7.0.0 and higher anymore. >> >> this looks good >> >>> Existing call-sites to these callbacks already skip calling into >>> them if the function pointer is NULL. >> >> This is more relevant for patch 3 commit message. >> >>> Add DPU_PINGPONG_DSC feature >>> bit to all chipset with DPU < 7.0.0. >> >> This is incorrect, as we do not change the catalog in this patch. >> > > Sorry but why not? The changes done to dpu_hw_catalog.c do exactly that. Because the patch does not add this feature bit to any of the chipsets. I think the relevant patch was lost somewhere during the rework/rebase.
On 5/10/2023 9:39 PM, Dmitry Baryshkov wrote: > On 11/05/2023 07:38, Abhinav Kumar wrote: >> >> >> On 5/10/2023 9:29 PM, Dmitry Baryshkov wrote: >>> On 11/05/2023 01:07, Kuogee Hsieh wrote: >>>> DPU < 7.0.0 requires the PINGPONG block to be involved during >>>> DSC setting up. Since DPU >= 7.0.0, enabling and starting the DSC >>>> encoder engine moved to INTF with the help of the flush mechanism. >>> >>> Nit: was moved. >>> >>>> Add a DPU_PINGPONG_DSC feature bit to restrict the availability of >>>> dpu_hw_pp_setup_dsc() and dpu_hw_pp_dsc_{enable,disable}() on the >>>> PINGPONG block to DPU < 7.0.0 hardware, as the registers are not >>>> available [in the PINGPONG block] on DPU 7.0.0 and higher anymore. >>> >>> this looks good >>> >>>> Existing call-sites to these callbacks already skip calling into >>>> them if the function pointer is NULL. >>> >>> This is more relevant for patch 3 commit message. >>> >>>> Add DPU_PINGPONG_DSC feature >>>> bit to all chipset with DPU < 7.0.0. >>> >>> This is incorrect, as we do not change the catalog in this patch. >>> >> >> Sorry but why not? The changes done to dpu_hw_catalog.c do exactly that. > > Because the patch does not add this feature bit to any of the chipsets. > I think the relevant patch was lost somewhere during the rework/rebase. > > > This is adding it right? #define PINGPONG_SDM845_MASK \ - (BIT(DPU_PINGPONG_DITHER) | BIT(DPU_PINGPONG_TE)) + (BIT(DPU_PINGPONG_DITHER) | BIT(DPU_PINGPONG_TE) | BIT(DPU_PINGPONG_DSC)) #define PINGPONG_SDM845_TE2_MASK \
On 11/05/2023 07:42, Abhinav Kumar wrote: > > > On 5/10/2023 9:39 PM, Dmitry Baryshkov wrote: >> On 11/05/2023 07:38, Abhinav Kumar wrote: >>> >>> >>> On 5/10/2023 9:29 PM, Dmitry Baryshkov wrote: >>>> On 11/05/2023 01:07, Kuogee Hsieh wrote: >>>>> DPU < 7.0.0 requires the PINGPONG block to be involved during >>>>> DSC setting up. Since DPU >= 7.0.0, enabling and starting the DSC >>>>> encoder engine moved to INTF with the help of the flush mechanism. >>>> >>>> Nit: was moved. >>>> >>>>> Add a DPU_PINGPONG_DSC feature bit to restrict the availability of >>>>> dpu_hw_pp_setup_dsc() and dpu_hw_pp_dsc_{enable,disable}() on the >>>>> PINGPONG block to DPU < 7.0.0 hardware, as the registers are not >>>>> available [in the PINGPONG block] on DPU 7.0.0 and higher anymore. >>>> >>>> this looks good >>>> >>>>> Existing call-sites to these callbacks already skip calling into >>>>> them if the function pointer is NULL. >>>> >>>> This is more relevant for patch 3 commit message. >>>> >>>>> Add DPU_PINGPONG_DSC feature >>>>> bit to all chipset with DPU < 7.0.0. >>>> >>>> This is incorrect, as we do not change the catalog in this patch. >>>> >>> >>> Sorry but why not? The changes done to dpu_hw_catalog.c do exactly that. >> >> Because the patch does not add this feature bit to any of the >> chipsets. I think the relevant patch was lost somewhere during the >> rework/rebase. >> >> >> > > This is adding it right? > > #define PINGPONG_SDM845_MASK \ > - (BIT(DPU_PINGPONG_DITHER) | BIT(DPU_PINGPONG_TE)) > + (BIT(DPU_PINGPONG_DITHER) | BIT(DPU_PINGPONG_TE) | > BIT(DPU_PINGPONG_DSC)) > #define PINGPONG_SDM845_TE2_MASK \ Ah, I see now. I was expecting changes to the actual catlog files. Please excuse me. As we are using PINGPONG_SDM845_MASK only up to and including DPU 6.x, this is correct. I'd then suggest rephrasing this sentence to be more explicit: Add DPU_PINGPONG_DSC to PINGPONG_SDM845_MASK, which is used for all DPU < 7.0 chipsets.
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c index 82b58c6..78e4bf6 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c @@ -76,13 +76,13 @@ (BIT(DPU_DIM_LAYER) | BIT(DPU_MIXER_COMBINED_ALPHA)) #define PINGPONG_SDM845_MASK \ - (BIT(DPU_PINGPONG_DITHER) | BIT(DPU_PINGPONG_TE)) + (BIT(DPU_PINGPONG_DITHER) | BIT(DPU_PINGPONG_TE) | BIT(DPU_PINGPONG_DSC)) #define PINGPONG_SDM845_TE2_MASK \ - (PINGPONG_SDM845_MASK | BIT(DPU_PINGPONG_TE2)) + (PINGPONG_SDM845_MASK | BIT(DPU_PINGPONG_TE2) | BIT(DPU_PINGPONG_DSC)) #define PINGPONG_SM8150_MASK \ - (BIT(DPU_PINGPONG_DITHER)) + (BIT(DPU_PINGPONG_DITHER) | BIT(DPU_PINGPONG_DSC)) #define CTL_SC7280_MASK \ (BIT(DPU_CTL_ACTIVE_CFG) | \ diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h index 6ee48f0..dc0a4da 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h @@ -144,7 +144,8 @@ enum { * @DPU_PINGPONG_TE2 Additional tear check block for split pipes * @DPU_PINGPONG_SPLIT PP block supports split fifo * @DPU_PINGPONG_SLAVE PP block is a suitable slave for split fifo - * @DPU_PINGPONG_DITHER, Dither blocks + * @DPU_PINGPONG_DITHER Dither blocks + * @DPU_PINGPONG_DSC PP ops functions required for DSC * @DPU_PINGPONG_MAX */ enum { @@ -153,6 +154,7 @@ enum { DPU_PINGPONG_SPLIT, DPU_PINGPONG_SLAVE, DPU_PINGPONG_DITHER, + DPU_PINGPONG_DSC, DPU_PINGPONG_MAX };
DPU < 7.0.0 requires the PINGPONG block to be involved during DSC setting up. Since DPU >= 7.0.0, enabling and starting the DSC encoder engine moved to INTF with the help of the flush mechanism. Add a DPU_PINGPONG_DSC feature bit to restrict the availability of dpu_hw_pp_setup_dsc() and dpu_hw_pp_dsc_{enable,disable}() on the PINGPONG block to DPU < 7.0.0 hardware, as the registers are not available [in the PINGPONG block] on DPU 7.0.0 and higher anymore. Existing call-sites to these callbacks already skip calling into them if the function pointer is NULL. Add DPU_PINGPONG_DSC feature bit to all chipset with DPU < 7.0.0. changes in v6: -- split patches and rearrange to keep catalog related files at this patch Signed-off-by: Kuogee Hsieh <quic_khsieh@quicinc.com> --- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 6 +++--- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 4 +++- 2 files changed, 6 insertions(+), 4 deletions(-)