| Message ID | 20230111114429.1297557-5-s-vadapalli@ti.com (mailing list archive) |
|---|---|
| State | Superseded |
| Delegated to: | Netdev Maintainers |
| Headers | show |
| Series | Add PPS support to am65-cpts driver | expand |
| Context | Check | Description |
|---|---|---|
| netdev/tree_selection | success | Clearly marked for net-next |
| netdev/fixes_present | success | Fixes tag not required for -next series |
| netdev/subject_prefix | success | Link |
| netdev/cover_letter | success | Series has a cover letter |
| netdev/patch_count | success | Link |
| netdev/header_inline | success | No static functions without inline keyword in header files |
| netdev/build_32bit | success | Errors and warnings before: 0 this patch: 0 |
| netdev/cc_maintainers | success | CCed 7 of 7 maintainers |
| netdev/build_clang | success | Errors and warnings before: 0 this patch: 0 |
| netdev/module_param | success | Was 0 now: 0 |
| netdev/verify_signedoff | success | Signed-off-by tag matches author and committer |
| netdev/check_selftest | success | No net selftest shell script |
| netdev/verify_fixes | success | No Fixes tag |
| netdev/build_allmodconfig_warn | success | Errors and warnings before: 0 this patch: 0 |
| netdev/checkpatch | success | total: 0 errors, 0 warnings, 0 checks, 15 lines checked |
| netdev/kdoc | success | Errors and warnings before: 0 this patch: 0 |
| netdev/source_inline | success | Was 0 now: 0 |
On 17:14-20230111, Siddharth Vadapalli wrote: > TI's AM62x SoC has a Time Sync Event Router, which enables routing a single > input signal to multiple recipients. This facilitates syncing all the > peripherals or processor cores to the input signal which acts as a master > clock. > > Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com> > --- > arch/arm64/boot/dts/ti/k3-am62-main.dtsi | 9 +++++++++ > 1 file changed, 9 insertions(+) > > diff --git a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi > index 072903649d6e..4ce59170b6a7 100644 > --- a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi > +++ b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi > @@ -649,6 +649,15 @@ cpts@3d000 { > }; > }; > > + timesync_router: pinctrl@a40000 { > + compatible = "pinctrl-single"; While I understand that the timesync router is essentially a mux, pinctrl-single is a specific mux model that is used to model external facing pins to internal signals - pin mux sections of control module which is already in place is an example of the same. Using the pinctrl-single scheme for timesync router is, IMHO, wrong and limiting to potential functions that timesync router could need enabling. Is there a reason for using pinctrl-single rather than writing a mux-controller / consumer model driver instead or rather simpler a reg-mux node? > + reg = <0x0 0xa40000 0x0 0x800>; > + #pinctrl-cells = <1>; > + pinctrl-single,register-width = <32>; > + pinctrl-single,function-mask = <0x000107ff>; > + status = "disabled"; > + }; > +
diff --git a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi index 072903649d6e..4ce59170b6a7 100644 --- a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi @@ -649,6 +649,15 @@ cpts@3d000 { }; }; + timesync_router: pinctrl@a40000 { + compatible = "pinctrl-single"; + reg = <0x0 0xa40000 0x0 0x800>; + #pinctrl-cells = <1>; + pinctrl-single,register-width = <32>; + pinctrl-single,function-mask = <0x000107ff>; + status = "disabled"; + }; + hwspinlock: spinlock@2a000000 { compatible = "ti,am64-hwspinlock"; reg = <0x00 0x2a000000 0x00 0x1000>;
TI's AM62x SoC has a Time Sync Event Router, which enables routing a single input signal to multiple recipients. This facilitates syncing all the peripherals or processor cores to the input signal which acts as a master clock. Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com> --- arch/arm64/boot/dts/ti/k3-am62-main.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+)