| Message ID | 20230515235713.232939-4-aford173@gmail.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm: bridge: samsung-dsim: Support variable clocking | expand |
Hi Adam, Am Montag, dem 15.05.2023 um 18:57 -0500 schrieb Adam Ford: > Make the pll-clock-frequency optional. If it's present, use it > to maintain backwards compatibility with existing hardware. If it > is absent, read clock rate of "sclk_mipi" to determine the rate. > Since it can be optional, change the message from an error to > dev_info. > > Signed-off-by: Adam Ford <aford173@gmail.com> > Tested-by: Chen-Yu Tsai <wenst@chromium.org> > Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de> > Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de> > --- > drivers/gpu/drm/bridge/samsung-dsim.c | 23 ++++++++++++++++------- > 1 file changed, 16 insertions(+), 7 deletions(-) > > diff --git a/drivers/gpu/drm/bridge/samsung-dsim.c b/drivers/gpu/drm/bridge/samsung-dsim.c > index bf4b33d2de76..08266303c261 100644 > --- a/drivers/gpu/drm/bridge/samsung-dsim.c > +++ b/drivers/gpu/drm/bridge/samsung-dsim.c > @@ -1712,11 +1712,11 @@ static const struct mipi_dsi_host_ops samsung_dsim_ops = { > }; > > static int samsung_dsim_of_read_u32(const struct device_node *np, > - const char *propname, u32 *out_value) > + const char *propname, u32 *out_value, bool optional) > { > int ret = of_property_read_u32(np, propname, out_value); > > - if (ret < 0) > + if (ret < 0 && !optional) > pr_err("%pOF: failed to get '%s' property\n", np, propname); > > return ret; > @@ -1726,20 +1726,29 @@ static int samsung_dsim_parse_dt(struct samsung_dsim *dsi) > { > struct device *dev = dsi->dev; > struct device_node *node = dev->of_node; > + struct clk *pll_clk; > int ret; > > ret = samsung_dsim_of_read_u32(node, "samsung,pll-clock-frequency", > - &dsi->pll_clk_rate); > - if (ret < 0) > - return ret; > + &dsi->pll_clk_rate, 1); > + > + /* If it doesn't exist, read it from the clock instead of failing */ > + if (ret < 0) { > + dev_info(dev, "Using sclk_mipi for pll clock frequency\n"); While this is certainly helpful while debugging the driver, I don't think it warrants a info print. Remove or downgrade to dev_dbg? On the other hand the changed driver behavior should be documented in the devicetree binding by moving "samsung,pll-clock-frequency" into the optional properties and spelling out which clock rate is used when the property is absent. Regards, Lucas > + pll_clk = devm_clk_get(dev, "sclk_mipi"); > + if (!IS_ERR(pll_clk)) > + dsi->pll_clk_rate = clk_get_rate(pll_clk); > + else > + return PTR_ERR(pll_clk); > + } > > ret = samsung_dsim_of_read_u32(node, "samsung,burst-clock-frequency", > - &dsi->burst_clk_rate); > + &dsi->burst_clk_rate, 0); > if (ret < 0) > return ret; > > ret = samsung_dsim_of_read_u32(node, "samsung,esc-clock-frequency", > - &dsi->esc_clk_rate); > + &dsi->esc_clk_rate, 0); > if (ret < 0) > return ret; >
On Wed, May 17, 2023 at 7:56 AM Lucas Stach <l.stach@pengutronix.de> wrote: > > Hi Adam, > > Am Montag, dem 15.05.2023 um 18:57 -0500 schrieb Adam Ford: > > Make the pll-clock-frequency optional. If it's present, use it > > to maintain backwards compatibility with existing hardware. If it > > is absent, read clock rate of "sclk_mipi" to determine the rate. > > Since it can be optional, change the message from an error to > > dev_info. > > > > Signed-off-by: Adam Ford <aford173@gmail.com> > > Tested-by: Chen-Yu Tsai <wenst@chromium.org> > > Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de> > > Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de> > > --- > > drivers/gpu/drm/bridge/samsung-dsim.c | 23 ++++++++++++++++------- > > 1 file changed, 16 insertions(+), 7 deletions(-) > > > > diff --git a/drivers/gpu/drm/bridge/samsung-dsim.c b/drivers/gpu/drm/bridge/samsung-dsim.c > > index bf4b33d2de76..08266303c261 100644 > > --- a/drivers/gpu/drm/bridge/samsung-dsim.c > > +++ b/drivers/gpu/drm/bridge/samsung-dsim.c > > @@ -1712,11 +1712,11 @@ static const struct mipi_dsi_host_ops samsung_dsim_ops = { > > }; > > > > static int samsung_dsim_of_read_u32(const struct device_node *np, > > - const char *propname, u32 *out_value) > > + const char *propname, u32 *out_value, bool optional) > > { > > int ret = of_property_read_u32(np, propname, out_value); > > > > - if (ret < 0) > > + if (ret < 0 && !optional) > > pr_err("%pOF: failed to get '%s' property\n", np, propname); > > > > return ret; > > @@ -1726,20 +1726,29 @@ static int samsung_dsim_parse_dt(struct samsung_dsim *dsi) > > { > > struct device *dev = dsi->dev; > > struct device_node *node = dev->of_node; > > + struct clk *pll_clk; > > int ret; > > > > ret = samsung_dsim_of_read_u32(node, "samsung,pll-clock-frequency", > > - &dsi->pll_clk_rate); > > - if (ret < 0) > > - return ret; > > + &dsi->pll_clk_rate, 1); > > + > > + /* If it doesn't exist, read it from the clock instead of failing */ > > + if (ret < 0) { > > + dev_info(dev, "Using sclk_mipi for pll clock frequency\n"); > > While this is certainly helpful while debugging the driver, I don't > think it warrants a info print. Remove or downgrade to dev_dbg? I can move to dbg. > > On the other hand the changed driver behavior should be documented in > the devicetree binding by moving "samsung,pll-clock-frequency" into the > optional properties and spelling out which clock rate is used when the > property is absent. Once this series is accepted, I was planning on doing a binding patch which describes the items that are now optional followed by a patch to add DSI->HDMI for the Beacon boards. I can see the value in putting the bindings patch in this series instead. I'll add it to the next revision to cover both items that are now optional. adam > > Regards, > Lucas > > > + pll_clk = devm_clk_get(dev, "sclk_mipi"); > > + if (!IS_ERR(pll_clk)) > > + dsi->pll_clk_rate = clk_get_rate(pll_clk); > > + else > > + return PTR_ERR(pll_clk); > > + } > > > > ret = samsung_dsim_of_read_u32(node, "samsung,burst-clock-frequency", > > - &dsi->burst_clk_rate); > > + &dsi->burst_clk_rate, 0); > > if (ret < 0) > > return ret; > > > > ret = samsung_dsim_of_read_u32(node, "samsung,esc-clock-frequency", > > - &dsi->esc_clk_rate); > > + &dsi->esc_clk_rate, 0); > > if (ret < 0) > > return ret; > > >
On Tue, May 16, 2023 at 5:27 AM Adam Ford <aford173@gmail.com> wrote: > > Make the pll-clock-frequency optional. If it's present, use it > to maintain backwards compatibility with existing hardware. If it > is absent, read clock rate of "sclk_mipi" to determine the rate. > Since it can be optional, change the message from an error to > dev_info. > > Signed-off-by: Adam Ford <aford173@gmail.com> > Tested-by: Chen-Yu Tsai <wenst@chromium.org> > Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de> > Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de> > --- Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # imx8mm-icore
diff --git a/drivers/gpu/drm/bridge/samsung-dsim.c b/drivers/gpu/drm/bridge/samsung-dsim.c index bf4b33d2de76..08266303c261 100644 --- a/drivers/gpu/drm/bridge/samsung-dsim.c +++ b/drivers/gpu/drm/bridge/samsung-dsim.c @@ -1712,11 +1712,11 @@ static const struct mipi_dsi_host_ops samsung_dsim_ops = { }; static int samsung_dsim_of_read_u32(const struct device_node *np, - const char *propname, u32 *out_value) + const char *propname, u32 *out_value, bool optional) { int ret = of_property_read_u32(np, propname, out_value); - if (ret < 0) + if (ret < 0 && !optional) pr_err("%pOF: failed to get '%s' property\n", np, propname); return ret; @@ -1726,20 +1726,29 @@ static int samsung_dsim_parse_dt(struct samsung_dsim *dsi) { struct device *dev = dsi->dev; struct device_node *node = dev->of_node; + struct clk *pll_clk; int ret; ret = samsung_dsim_of_read_u32(node, "samsung,pll-clock-frequency", - &dsi->pll_clk_rate); - if (ret < 0) - return ret; + &dsi->pll_clk_rate, 1); + + /* If it doesn't exist, read it from the clock instead of failing */ + if (ret < 0) { + dev_info(dev, "Using sclk_mipi for pll clock frequency\n"); + pll_clk = devm_clk_get(dev, "sclk_mipi"); + if (!IS_ERR(pll_clk)) + dsi->pll_clk_rate = clk_get_rate(pll_clk); + else + return PTR_ERR(pll_clk); + } ret = samsung_dsim_of_read_u32(node, "samsung,burst-clock-frequency", - &dsi->burst_clk_rate); + &dsi->burst_clk_rate, 0); if (ret < 0) return ret; ret = samsung_dsim_of_read_u32(node, "samsung,esc-clock-frequency", - &dsi->esc_clk_rate); + &dsi->esc_clk_rate, 0); if (ret < 0) return ret;