Message ID | 20230522201404.660242-4-festevam@gmail.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | [v6,1/5] PCI: imx6: Use a more specific i.MX6SX GPR compatible | expand |
On 5/22/23 22:14, Fabio Estevam wrote: > From: Fabio Estevam <festevam@denx.de> > > i.MX6SX has an LVDS controller that is connected to the eLCDIF. > > Add support for it. > > Signed-off-by: Fabio Estevam <festevam@denx.de> > --- > Changes since v5: > - Dropped fsl,imx6q-iomuxc-gpr" and "reg-names" (Marek). > > arch/arm/boot/dts/imx6sx.dtsi | 43 ++++++++++++++++++++++++++++++++--- > 1 file changed, 40 insertions(+), 3 deletions(-) > > diff --git a/arch/arm/boot/dts/imx6sx.dtsi b/arch/arm/boot/dts/imx6sx.dtsi > index 4233943a1cca..8dd38107bed2 100644 > --- a/arch/arm/boot/dts/imx6sx.dtsi > +++ b/arch/arm/boot/dts/imx6sx.dtsi > @@ -841,10 +841,39 @@ iomuxc: pinctrl@20e0000 { > reg = <0x020e0000 0x4000>; > }; > > - gpr: iomuxc-gpr@20e4000 { > - compatible = "fsl,imx6sx-iomuxc-gpr", > - "fsl,imx6q-iomuxc-gpr", "syscon"; > + gpr: syscon@20e4000 { > + compatible = "fsl,imx6sx-iomuxc-gpr", "syscon"; > + #address-cells = <1>; > + #size-cells = <1>; > reg = <0x020e4000 0x4000>; > + > + lvds_bridge: bridge@18 { > + compatible = "fsl,imx6sx-ldb"; > + reg = <0x18 0x4>; > + clocks = <&clks IMX6SX_CLK_LDB_DI0>; > + clock-names = "ldb"; Since there is only once clock, is this clock-names even needed ?
Hi Marek, On Mon, May 22, 2023 at 11:57 PM Marek Vasut <marex@denx.de> wrote: > > + lvds_bridge: bridge@18 { > > + compatible = "fsl,imx6sx-ldb"; > > + reg = <0x18 0x4>; > > + clocks = <&clks IMX6SX_CLK_LDB_DI0>; > > + clock-names = "ldb"; > > Since there is only once clock, is this clock-names even needed ? As of today, clock-names is needed because drivers/gpu/drm/bridge/fsl-ldb.c retrieves the ldb clock like this: fsl_ldb->clk = devm_clk_get(dev, "ldb") If you want, I can change it to fsl_ldb->clk = devm_clk_get(dev, NULL) and also remove clock-names from fsl,ldb.yaml and from imx8mp.dtsi. Or this cleanup can also be a follow-up patch. Just let me know what you prefer.
On 5/23/23 13:34, Fabio Estevam wrote: > Hi Marek, > > On Mon, May 22, 2023 at 11:57 PM Marek Vasut <marex@denx.de> wrote: > >>> + lvds_bridge: bridge@18 { >>> + compatible = "fsl,imx6sx-ldb"; >>> + reg = <0x18 0x4>; >>> + clocks = <&clks IMX6SX_CLK_LDB_DI0>; >>> + clock-names = "ldb"; >> >> Since there is only once clock, is this clock-names even needed ? > > As of today, clock-names is needed because > drivers/gpu/drm/bridge/fsl-ldb.c retrieves the ldb clock like this: > > fsl_ldb->clk = devm_clk_get(dev, "ldb") > > If you want, I can change it to fsl_ldb->clk = devm_clk_get(dev, NULL) > and also remove clock-names from > fsl,ldb.yaml and from imx8mp.dtsi. > > Or this cleanup can also be a follow-up patch. Just let me know what you prefer. I think a follow up patch would be perfectly fine , let's not grow the series unnecessarily .
diff --git a/arch/arm/boot/dts/imx6sx.dtsi b/arch/arm/boot/dts/imx6sx.dtsi index 4233943a1cca..8dd38107bed2 100644 --- a/arch/arm/boot/dts/imx6sx.dtsi +++ b/arch/arm/boot/dts/imx6sx.dtsi @@ -841,10 +841,39 @@ iomuxc: pinctrl@20e0000 { reg = <0x020e0000 0x4000>; }; - gpr: iomuxc-gpr@20e4000 { - compatible = "fsl,imx6sx-iomuxc-gpr", - "fsl,imx6q-iomuxc-gpr", "syscon"; + gpr: syscon@20e4000 { + compatible = "fsl,imx6sx-iomuxc-gpr", "syscon"; + #address-cells = <1>; + #size-cells = <1>; reg = <0x020e4000 0x4000>; + + lvds_bridge: bridge@18 { + compatible = "fsl,imx6sx-ldb"; + reg = <0x18 0x4>; + clocks = <&clks IMX6SX_CLK_LDB_DI0>; + clock-names = "ldb"; + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + ldb_from_lcdif1: endpoint { + remote-endpoint = <&lcdif1_to_ldb>; + }; + }; + + port@1 { + reg = <1>; + + ldb_lvds_ch0: endpoint { + }; + }; + }; + }; }; sdma: dma-controller@20ec000 { @@ -1278,6 +1307,14 @@ lcdif1: lcdif@2220000 { clock-names = "pix", "axi", "disp_axi"; power-domains = <&pd_disp>; status = "disabled"; + + ports { + port { + lcdif1_to_ldb: endpoint { + remote-endpoint = <&ldb_from_lcdif1>; + }; + }; + }; }; lcdif2: lcdif@2224000 {