Message ID | 20230413164916.4221-5-ville.syrjala@linux.intel.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | drm/i915: CTM stuff mostly | expand |
> -----Original Message----- > From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Ville Syrjala > Sent: Thursday, April 13, 2023 10:19 PM > To: intel-gfx@lists.freedesktop.org > Cc: dri-devel@lists.freedesktop.org > Subject: [Intel-gfx] [PATCH v2 4/7] drm/i915: Always enable CGM CSC on CHV > > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > On CHV toggling the CGM CSC on/off while the pipe is running leads to underruns. > Looks like we'd have to do the toggling strictly inside the start_of_vblank- > frame_start window to avoid this, but that window is less than a scanline so there's > no way we can guarantee hitting it. > > As a workaround let's just leave the CGM CSC permanently enabled. > Fortunately the CGM gamma/degamma units don't seem to suffer from this malady. > > I also tried turning off CGM unit clock gating, but that did not help. Looks Good to me. Reviewed-by: Uma Shankar <uma.shankar@intel.com> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> > --- > drivers/gpu/drm/i915/display/intel_color.c | 21 +++++++++++++++++++-- > 1 file changed, 19 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_color.c > b/drivers/gpu/drm/i915/display/intel_color.c > index 63141f4ed372..7a705e7d8776 100644 > --- a/drivers/gpu/drm/i915/display/intel_color.c > +++ b/drivers/gpu/drm/i915/display/intel_color.c > @@ -605,6 +605,16 @@ static void chv_cgm_csc_convert_ctm(const struct > intel_crtc_state *crtc_state, > csc->coeff[i] = ctm_to_twos_complement(ctm->matrix[i], 4, 12); } > > +#define CHV_CGM_CSC_COEFF_1_0 (1 << 12) > + > +static const struct intel_csc_matrix chv_cgm_csc_matrix_identity = { > + .coeff = { > + CHV_CGM_CSC_COEFF_1_0, 0, 0, > + 0, CHV_CGM_CSC_COEFF_1_0, 0, > + 0, 0, CHV_CGM_CSC_COEFF_1_0, > + }, > +}; > + > static void chv_load_cgm_csc(struct intel_crtc *crtc, > const struct intel_csc_matrix *csc) { @@ -667,9 +677,9 > @@ static void chv_assign_csc(struct intel_crtc_state *crtc_state) > > chv_cgm_csc_convert_ctm(crtc_state, &crtc_state->csc); > } else { > - drm_WARN_ON(&i915->drm, (crtc_state->cgm_mode & > CGM_PIPE_MODE_CSC) != 0); > + drm_WARN_ON(&i915->drm, (crtc_state->cgm_mode & > CGM_PIPE_MODE_CSC) == > +0); > > - intel_csc_clear(&crtc_state->csc); > + crtc_state->csc = chv_cgm_csc_matrix_identity; > } > } > > @@ -2033,6 +2043,13 @@ static u32 chv_cgm_mode(const struct intel_crtc_state > *crtc_state) > !lut_is_legacy(crtc_state->hw.gamma_lut)) > cgm_mode |= CGM_PIPE_MODE_GAMMA; > > + /* > + * Toggling the CGM CSC on/off outside of the tiny window > + * between start of vblank and frame start causes underruns. > + * Always enable the CGM CSC as a workaround. > + */ > + cgm_mode |= CGM_PIPE_MODE_CSC; > + > return cgm_mode; > } > > -- > 2.39.2
diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c index 63141f4ed372..7a705e7d8776 100644 --- a/drivers/gpu/drm/i915/display/intel_color.c +++ b/drivers/gpu/drm/i915/display/intel_color.c @@ -605,6 +605,16 @@ static void chv_cgm_csc_convert_ctm(const struct intel_crtc_state *crtc_state, csc->coeff[i] = ctm_to_twos_complement(ctm->matrix[i], 4, 12); } +#define CHV_CGM_CSC_COEFF_1_0 (1 << 12) + +static const struct intel_csc_matrix chv_cgm_csc_matrix_identity = { + .coeff = { + CHV_CGM_CSC_COEFF_1_0, 0, 0, + 0, CHV_CGM_CSC_COEFF_1_0, 0, + 0, 0, CHV_CGM_CSC_COEFF_1_0, + }, +}; + static void chv_load_cgm_csc(struct intel_crtc *crtc, const struct intel_csc_matrix *csc) { @@ -667,9 +677,9 @@ static void chv_assign_csc(struct intel_crtc_state *crtc_state) chv_cgm_csc_convert_ctm(crtc_state, &crtc_state->csc); } else { - drm_WARN_ON(&i915->drm, (crtc_state->cgm_mode & CGM_PIPE_MODE_CSC) != 0); + drm_WARN_ON(&i915->drm, (crtc_state->cgm_mode & CGM_PIPE_MODE_CSC) == 0); - intel_csc_clear(&crtc_state->csc); + crtc_state->csc = chv_cgm_csc_matrix_identity; } } @@ -2033,6 +2043,13 @@ static u32 chv_cgm_mode(const struct intel_crtc_state *crtc_state) !lut_is_legacy(crtc_state->hw.gamma_lut)) cgm_mode |= CGM_PIPE_MODE_GAMMA; + /* + * Toggling the CGM CSC on/off outside of the tiny window + * between start of vblank and frame start causes underruns. + * Always enable the CGM CSC as a workaround. + */ + cgm_mode |= CGM_PIPE_MODE_CSC; + return cgm_mode; }