Message ID | 71105dbf-cdb0-72e1-f9eb-eeda8e321696@omp.ru (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | [v6] sh: avoid using IRQ0 on SH3/4 | expand |
Hi Sergey! On Thu, 2023-06-01 at 23:22 +0300, Sergey Shtylyov wrote: > IRQ0 is no longer returned by platform_get_irq() and its ilk -- they now > return -EINVAL instead. However, the kernel code supporting SH3/4 based > SoCs still maps the IRQ #s starting at 0 -- modify that code to start the > IRQ #s from 16 instead. > > The patch should mostly affect the AP-SH4A-3A/AP-SH4AD-0A boards as they > indeed are using IRQ0 for the SMSC911x compatible Ethernet chip... I don't have time today, but I will look at all current SH patches over the weekend. Thanks a lot for being so persistent. Adrian
On Thu, 2023-06-01 at 23:22 +0300, Sergey Shtylyov wrote: > IRQ0 is no longer returned by platform_get_irq() and its ilk -- they now > return -EINVAL instead. However, the kernel code supporting SH3/4 based > SoCs still maps the IRQ #s starting at 0 -- modify that code to start the > IRQ #s from 16 instead. > > The patch should mostly affect the AP-SH4A-3A/AP-SH4AD-0A boards as they > indeed are using IRQ0 for the SMSC911x compatible Ethernet chip... Do you mind if I remove the ellipsis at the end of this sentence when I merge this later today? I think it makes no sense from a grammatical point of view. Adrian
On Thu, 2023-06-01 at 23:22 +0300, Sergey Shtylyov wrote: > IRQ0 is no longer returned by platform_get_irq() and its ilk -- they now > return -EINVAL instead. However, the kernel code supporting SH3/4 based > SoCs still maps the IRQ #s starting at 0 -- modify that code to start the > IRQ #s from 16 instead. > > The patch should mostly affect the AP-SH4A-3A/AP-SH4AD-0A boards as they > indeed are using IRQ0 for the SMSC911x compatible Ethernet chip... > > Fixes: ce753ad1549c ("platform: finally disallow IRQ0 in platform_get_irq() and its ilk") > Signed-off-by: Sergey Shtylyov <s.shtylyov@omp.ru> > Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> > Tested-by: Geert Uytterhoeven <geert+renesas@glider.be> > Tested-by: John Paul Adrian Glaubitz <glaubitz@physik.fu-berlin.de> > > --- > The patch is against Linus Torvalds' 'linux.git' repo. > > Changes in version 6: > - fixed up inconsistencies and did some rewording in the patch description. > > Changes in version 5: > - updated the patch description and the "Fixes:" tag as the patch disallowing > the use of IRQ0 was merged meanwhile. > > Changes in version 4: > - fixed up the off-chip base IRQ #s for the Dreamcast/Highlander/R2D/SE7724 > boards. > > Changes in version 3: > - added an appropriate Fixes: tag and added a passage about it to the patch > description; > - added actual cases of the boards using IRQ0 to the patch description; > - added Geert Uytterhoeven's and John Paul Adrian Glaubitz's tags; > - updated the link to point to the version 2 of the patch. > > Changes in version 2: > - changed cmp/ge to cmp/hs in the assembly code. > > arch/sh/include/mach-common/mach/highlander.h | 2 +- > arch/sh/include/mach-common/mach/r2d.h | 2 +- > arch/sh/include/mach-dreamcast/mach/sysasic.h | 2 +- > arch/sh/include/mach-se/mach/se7724.h | 2 +- > arch/sh/kernel/cpu/sh3/entry.S | 4 ++-- > include/linux/sh_intc.h | 6 +++--- > 6 files changed, 9 insertions(+), 9 deletions(-) > > Index: linux/arch/sh/include/mach-common/mach/highlander.h > =================================================================== > --- linux.orig/arch/sh/include/mach-common/mach/highlander.h > +++ linux/arch/sh/include/mach-common/mach/highlander.h > @@ -176,7 +176,7 @@ > #define IVDR_CK_ON 4 /* iVDR Clock ON */ > #endif > > -#define HL_FPGA_IRQ_BASE 200 > +#define HL_FPGA_IRQ_BASE (200 + 16) > #define HL_NR_IRL 15 > > #define IRQ_AX88796 (HL_FPGA_IRQ_BASE + 0) > Index: linux/arch/sh/include/mach-common/mach/r2d.h > =================================================================== > --- linux.orig/arch/sh/include/mach-common/mach/r2d.h > +++ linux/arch/sh/include/mach-common/mach/r2d.h > @@ -47,7 +47,7 @@ > > #define IRLCNTR1 (PA_BCR + 0) /* Interrupt Control Register1 */ > > -#define R2D_FPGA_IRQ_BASE 100 > +#define R2D_FPGA_IRQ_BASE (100 + 16) > > #define IRQ_VOYAGER (R2D_FPGA_IRQ_BASE + 0) > #define IRQ_EXT (R2D_FPGA_IRQ_BASE + 1) > Index: linux/arch/sh/include/mach-dreamcast/mach/sysasic.h > =================================================================== > --- linux.orig/arch/sh/include/mach-dreamcast/mach/sysasic.h > +++ linux/arch/sh/include/mach-dreamcast/mach/sysasic.h > @@ -22,7 +22,7 @@ > takes. > */ > > -#define HW_EVENT_IRQ_BASE 48 > +#define HW_EVENT_IRQ_BASE (48 + 16) > > /* IRQ 13 */ > #define HW_EVENT_VSYNC (HW_EVENT_IRQ_BASE + 5) /* VSync */ > Index: linux/arch/sh/include/mach-se/mach/se7724.h > =================================================================== > --- linux.orig/arch/sh/include/mach-se/mach/se7724.h > +++ linux/arch/sh/include/mach-se/mach/se7724.h > @@ -37,7 +37,7 @@ > #define IRQ2_IRQ evt2irq(0x640) > > /* Bits in IRQ012 registers */ > -#define SE7724_FPGA_IRQ_BASE 220 > +#define SE7724_FPGA_IRQ_BASE (220 + 16) > > /* IRQ0 */ > #define IRQ0_BASE SE7724_FPGA_IRQ_BASE > Index: linux/arch/sh/kernel/cpu/sh3/entry.S > =================================================================== > --- linux.orig/arch/sh/kernel/cpu/sh3/entry.S > +++ linux/arch/sh/kernel/cpu/sh3/entry.S > @@ -470,9 +470,9 @@ ENTRY(handle_interrupt) > mov r4, r0 ! save vector->jmp table offset for later > > shlr2 r4 ! vector to IRQ# conversion > - add #-0x10, r4 > > - cmp/pz r4 ! is it a valid IRQ? > + mov #0x10, r5 > + cmp/hs r5, r4 ! is it a valid IRQ? > bt 10f > > /* > Index: linux/include/linux/sh_intc.h > =================================================================== > --- linux.orig/include/linux/sh_intc.h > +++ linux/include/linux/sh_intc.h > @@ -13,9 +13,9 @@ > /* > * Convert back and forth between INTEVT and IRQ values. > */ > -#ifdef CONFIG_CPU_HAS_INTEVT > -#define evt2irq(evt) (((evt) >> 5) - 16) > -#define irq2evt(irq) (((irq) + 16) << 5) > +#ifdef CONFIG_CPU_HAS_INTEVT /* Avoid IRQ0 (invalid for platform devices) */ > +#define evt2irq(evt) ((evt) >> 5) > +#define irq2evt(irq) ((irq) << 5) > #else > #define evt2irq(evt) (evt) > #define irq2evt(irq) (irq) Reviewed-by: John Paul Adrian Glaubitz <glaubitz@physik.fu-berlin.de>
On 6/10/23 7:32 AM, John Paul Adrian Glaubitz wrote: >> IRQ0 is no longer returned by platform_get_irq() and its ilk -- they now >> return -EINVAL instead. However, the kernel code supporting SH3/4 based >> SoCs still maps the IRQ #s starting at 0 -- modify that code to start the >> IRQ #s from 16 instead. >> >> The patch should mostly affect the AP-SH4A-3A/AP-SH4AD-0A boards as they >> indeed are using IRQ0 for the SMSC911x compatible Ethernet chip... > > Do you mind if I remove the ellipsis at the end of this sentence when I merge > this later today? I think it makes no sense from a grammatical point of view. No, I don't mind. :-) > Adrian MBR, Sergey
On Sat, 2023-06-10 at 13:24 +0300, Sergei Shtylyov wrote: > On 6/10/23 7:32 AM, John Paul Adrian Glaubitz wrote: > > > > IRQ0 is no longer returned by platform_get_irq() and its ilk -- they now > > > return -EINVAL instead. However, the kernel code supporting SH3/4 based > > > SoCs still maps the IRQ #s starting at 0 -- modify that code to start the > > > IRQ #s from 16 instead. > > > > > > The patch should mostly affect the AP-SH4A-3A/AP-SH4AD-0A boards as they > > > indeed are using IRQ0 for the SMSC911x compatible Ethernet chip... > > > > Do you mind if I remove the ellipsis at the end of this sentence when I merge > > this later today? I think it makes no sense from a grammatical point of view. > > No, I don't mind. :-) Applied to my for-next branch. Thanks, Adrian
On 6/11/23 8:28 AM, John Paul Adrian Glaubitz wrote: [...] >>>> IRQ0 is no longer returned by platform_get_irq() and its ilk -- they now >>>> return -EINVAL instead. However, the kernel code supporting SH3/4 based >>>> SoCs still maps the IRQ #s starting at 0 -- modify that code to start the >>>> IRQ #s from 16 instead. >>>> >>>> The patch should mostly affect the AP-SH4A-3A/AP-SH4AD-0A boards as they >>>> indeed are using IRQ0 for the SMSC911x compatible Ethernet chip... >>> >>> Do you mind if I remove the ellipsis at the end of this sentence when I merge >>> this later today? I think it makes no sense from a grammatical point of view. >> >> No, I don't mind. :-) > > Applied to my for-next branch. Note that this was positioned as a fix. Where is your tree, BTW? :-) > Thanks, > Adrian MBR, Sergey
Hi Sergey! On Mon, 2023-06-12 at 13:56 +0300, Sergey Shtylyov wrote: > > Applied to my for-next branch. > > Note that this was positioned as a fix. Hmm, it will be at least backported to the stable trees. > Where is your tree, BTW? :-) https://git.kernel.org/pub/scm/linux/kernel/git/glaubitz/sh-linux.git Adrian
On 6/12/23 2:01 PM, John Paul Adrian Glaubitz wrote: [...] >>> Applied to my for-next branch. >> >> Note that this was positioned as a fix. > > Hmm, it will be at least backported to the stable trees. OK. :-) >> Where is your tree, BTW? :-) > > https://git.kernel.org/pub/scm/linux/kernel/git/glaubitz/sh-linux.git Shouldn't it be published in MAINTANERS? > Adrian MBR, Sergey
Index: linux/arch/sh/include/mach-common/mach/highlander.h =================================================================== --- linux.orig/arch/sh/include/mach-common/mach/highlander.h +++ linux/arch/sh/include/mach-common/mach/highlander.h @@ -176,7 +176,7 @@ #define IVDR_CK_ON 4 /* iVDR Clock ON */ #endif -#define HL_FPGA_IRQ_BASE 200 +#define HL_FPGA_IRQ_BASE (200 + 16) #define HL_NR_IRL 15 #define IRQ_AX88796 (HL_FPGA_IRQ_BASE + 0) Index: linux/arch/sh/include/mach-common/mach/r2d.h =================================================================== --- linux.orig/arch/sh/include/mach-common/mach/r2d.h +++ linux/arch/sh/include/mach-common/mach/r2d.h @@ -47,7 +47,7 @@ #define IRLCNTR1 (PA_BCR + 0) /* Interrupt Control Register1 */ -#define R2D_FPGA_IRQ_BASE 100 +#define R2D_FPGA_IRQ_BASE (100 + 16) #define IRQ_VOYAGER (R2D_FPGA_IRQ_BASE + 0) #define IRQ_EXT (R2D_FPGA_IRQ_BASE + 1) Index: linux/arch/sh/include/mach-dreamcast/mach/sysasic.h =================================================================== --- linux.orig/arch/sh/include/mach-dreamcast/mach/sysasic.h +++ linux/arch/sh/include/mach-dreamcast/mach/sysasic.h @@ -22,7 +22,7 @@ takes. */ -#define HW_EVENT_IRQ_BASE 48 +#define HW_EVENT_IRQ_BASE (48 + 16) /* IRQ 13 */ #define HW_EVENT_VSYNC (HW_EVENT_IRQ_BASE + 5) /* VSync */ Index: linux/arch/sh/include/mach-se/mach/se7724.h =================================================================== --- linux.orig/arch/sh/include/mach-se/mach/se7724.h +++ linux/arch/sh/include/mach-se/mach/se7724.h @@ -37,7 +37,7 @@ #define IRQ2_IRQ evt2irq(0x640) /* Bits in IRQ012 registers */ -#define SE7724_FPGA_IRQ_BASE 220 +#define SE7724_FPGA_IRQ_BASE (220 + 16) /* IRQ0 */ #define IRQ0_BASE SE7724_FPGA_IRQ_BASE Index: linux/arch/sh/kernel/cpu/sh3/entry.S =================================================================== --- linux.orig/arch/sh/kernel/cpu/sh3/entry.S +++ linux/arch/sh/kernel/cpu/sh3/entry.S @@ -470,9 +470,9 @@ ENTRY(handle_interrupt) mov r4, r0 ! save vector->jmp table offset for later shlr2 r4 ! vector to IRQ# conversion - add #-0x10, r4 - cmp/pz r4 ! is it a valid IRQ? + mov #0x10, r5 + cmp/hs r5, r4 ! is it a valid IRQ? bt 10f /* Index: linux/include/linux/sh_intc.h =================================================================== --- linux.orig/include/linux/sh_intc.h +++ linux/include/linux/sh_intc.h @@ -13,9 +13,9 @@ /* * Convert back and forth between INTEVT and IRQ values. */ -#ifdef CONFIG_CPU_HAS_INTEVT -#define evt2irq(evt) (((evt) >> 5) - 16) -#define irq2evt(irq) (((irq) + 16) << 5) +#ifdef CONFIG_CPU_HAS_INTEVT /* Avoid IRQ0 (invalid for platform devices) */ +#define evt2irq(evt) ((evt) >> 5) +#define irq2evt(irq) ((irq) << 5) #else #define evt2irq(evt) (evt) #define irq2evt(irq) (irq)