| Message ID | 20230530112050.5635-3-aford173@gmail.com (mailing list archive) |
|---|---|
| State | Not Applicable, archived |
| Headers | show |
| Series | [RFC,1/3] clk: renesas: rcar-gen3: Add support for ZG clock | expand |
Hi Adam, On Tue, May 30, 2023 at 1:21 PM Adam Ford <aford173@gmail.com> wrote: > With the 3dge and ZG clocks now available, the generic GPU node can > be added. Until proper firmware is made, it is not usable. > > Signed-off-by: Adam Ford <aford173@gmail.com> > --- > This is based on the assumption that the Rogue 6250 could use > generic driver [1] and firmware [2] being implemebted by the Mesa group > and others. In practice, the firmware isn't really compatible since > the 6250 in the RZ/G2M appears to be a different variant. > > [1] - https://gitlab.freedesktop.org/frankbinns/powervr/-/tree/powervr-next > [2] - https://gitlab.freedesktop.org/frankbinns/linux-firmware/-/tree/powervr/powervr Thanks for your patch! > --- a/arch/arm64/boot/dts/renesas/r8a774a1.dtsi > +++ b/arch/arm64/boot/dts/renesas/r8a774a1.dtsi > @@ -226,6 +226,27 @@ extalr_clk: extalr { > clock-frequency = <0>; > }; > > + gpu_opp_table: opp-table { > + compatible = "operating-points-v2"; > + > + opp-200000000 { > + opp-hz = /bits/ 64 <200000000>; > + opp-microvolt = <830000>; > + }; > + opp-300000000 { > + opp-hz = /bits/ 64 <300000000>; > + opp-microvolt = <830000>; > + }; > + opp-400000000 { > + opp-hz = /bits/ 64 <400000000>; > + opp-microvolt = <830000>; > + }; > + opp-600000000 { > + opp-hz = /bits/ 64 <600000000>; > + opp-microvolt = <830000>; > + }; > + }; > + > /* External PCIe clock - can be overridden by the board */ > pcie_bus_clk: pcie_bus { > compatible = "fixed-clock"; > @@ -2347,6 +2368,18 @@ gic: interrupt-controller@f1010000 { > resets = <&cpg 408>; > }; > > + gpu@fd000000 { > + compatible = "img,powervr-series6xt"; > + reg = <0 0xfd000000 0 0x40000>; > + interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&cpg CPG_MOD 112>, <&cpg CPG_MOD 112>,<&cpg CPG_MOD 112>; > + clock-names = "core", "mem", "sys"; > + interrupt-names = "gpu"; > + operating-points-v2 = <&gpu_opp_table>; > + power-domains = <&sysc R8A774A1_PD_3DG_B>; > + resets = <&cpg 112>; > + }; > + > pciec0: pcie@fe000000 { > compatible = "renesas,pcie-r8a774a1", > "renesas,pcie-rcar-gen3"; LGTM. But obviously I cannot take this as-is, as there are no DT bindings for this device, and it didn't work for you... Gr{oetje,eeting}s, Geert
On Wed, Jun 7, 2023 at 8:21 AM Geert Uytterhoeven <geert@linux-m68k.org> wrote: > > Hi Adam, > > On Tue, May 30, 2023 at 1:21 PM Adam Ford <aford173@gmail.com> wrote: > > With the 3dge and ZG clocks now available, the generic GPU node can > > be added. Until proper firmware is made, it is not usable. > > > > Signed-off-by: Adam Ford <aford173@gmail.com> > > --- > > This is based on the assumption that the Rogue 6250 could use > > generic driver [1] and firmware [2] being implemebted by the Mesa group > > and others. In practice, the firmware isn't really compatible since > > the 6250 in the RZ/G2M appears to be a different variant. > > > > [1] - https://gitlab.freedesktop.org/frankbinns/powervr/-/tree/powervr-next > > [2] - https://gitlab.freedesktop.org/frankbinns/linux-firmware/-/tree/powervr/powervr > > Thanks for your patch! > > > --- a/arch/arm64/boot/dts/renesas/r8a774a1.dtsi > > +++ b/arch/arm64/boot/dts/renesas/r8a774a1.dtsi > > @@ -226,6 +226,27 @@ extalr_clk: extalr { > > clock-frequency = <0>; > > }; > > > > + gpu_opp_table: opp-table { > > + compatible = "operating-points-v2"; > > + > > + opp-200000000 { > > + opp-hz = /bits/ 64 <200000000>; > > + opp-microvolt = <830000>; > > + }; > > + opp-300000000 { > > + opp-hz = /bits/ 64 <300000000>; > > + opp-microvolt = <830000>; > > + }; > > + opp-400000000 { > > + opp-hz = /bits/ 64 <400000000>; > > + opp-microvolt = <830000>; > > + }; > > + opp-600000000 { > > + opp-hz = /bits/ 64 <600000000>; > > + opp-microvolt = <830000>; > > + }; > > + }; > > + > > /* External PCIe clock - can be overridden by the board */ > > pcie_bus_clk: pcie_bus { > > compatible = "fixed-clock"; > > @@ -2347,6 +2368,18 @@ gic: interrupt-controller@f1010000 { > > resets = <&cpg 408>; > > }; > > > > + gpu@fd000000 { > > + compatible = "img,powervr-series6xt"; > > + reg = <0 0xfd000000 0 0x40000>; > > + interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>; > > + clocks = <&cpg CPG_MOD 112>, <&cpg CPG_MOD 112>,<&cpg CPG_MOD 112>; > > + clock-names = "core", "mem", "sys"; > > + interrupt-names = "gpu"; > > + operating-points-v2 = <&gpu_opp_table>; > > + power-domains = <&sysc R8A774A1_PD_3DG_B>; > > + resets = <&cpg 112>; > > + }; > > + > > pciec0: pcie@fe000000 { > > compatible = "renesas,pcie-r8a774a1", > > "renesas,pcie-rcar-gen3"; > > LGTM. But obviously I cannot take this as-is, as there are no DT bindings > for this device, and it didn't work for you... It was mostly to follow up to the previous ones with links for the mainline Rogue video driver in the hopes that someone from Renesas might have some input on whether or not Renesas might be able to support this and have a discussion. I knew when I submitted it that it wouldn't be accepted which is why I posted it as an RFC. If I address concerns you have in the previous patches, would you be OK with me submitting then as a formal patch to at least get the rest of the system ready in the event the GPU driver/firmware becomes available? It seems harmless, but I also see the argument that it's dead code without the GPU node. If not, I'll shelve this for now, and hope to get some responses from Renesas. adam > > Gr{oetje,eeting}s, > > Geert > > -- > Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org > > In personal conversations with technical people, I call myself a hacker. But > when I'm talking to journalists I just say "programmer" or something like that. > -- Linus Torvalds
Hi Adam, On Wed, Jun 7, 2023 at 3:31 PM Adam Ford <aford173@gmail.com> wrote: > On Wed, Jun 7, 2023 at 8:21 AM Geert Uytterhoeven <geert@linux-m68k.org> wrote: > > On Tue, May 30, 2023 at 1:21 PM Adam Ford <aford173@gmail.com> wrote: > > > With the 3dge and ZG clocks now available, the generic GPU node can > > > be added. Until proper firmware is made, it is not usable. > > > > > > Signed-off-by: Adam Ford <aford173@gmail.com> > > > --- > > > This is based on the assumption that the Rogue 6250 could use > > > generic driver [1] and firmware [2] being implemebted by the Mesa group > > > and others. In practice, the firmware isn't really compatible since > > > the 6250 in the RZ/G2M appears to be a different variant. > > > > > > [1] - https://gitlab.freedesktop.org/frankbinns/powervr/-/tree/powervr-next > > > [2] - https://gitlab.freedesktop.org/frankbinns/linux-firmware/-/tree/powervr/powervr > > > > Thanks for your patch! > > > > > --- a/arch/arm64/boot/dts/renesas/r8a774a1.dtsi > > > +++ b/arch/arm64/boot/dts/renesas/r8a774a1.dtsi > > > @@ -226,6 +226,27 @@ extalr_clk: extalr { > > > clock-frequency = <0>; > > > }; > > > > > > + gpu_opp_table: opp-table { > > > + compatible = "operating-points-v2"; > > > + > > > + opp-200000000 { > > > + opp-hz = /bits/ 64 <200000000>; > > > + opp-microvolt = <830000>; > > > + }; > > > + opp-300000000 { > > > + opp-hz = /bits/ 64 <300000000>; > > > + opp-microvolt = <830000>; > > > + }; > > > + opp-400000000 { > > > + opp-hz = /bits/ 64 <400000000>; > > > + opp-microvolt = <830000>; > > > + }; > > > + opp-600000000 { > > > + opp-hz = /bits/ 64 <600000000>; > > > + opp-microvolt = <830000>; > > > + }; > > > + }; > > > + > > > /* External PCIe clock - can be overridden by the board */ > > > pcie_bus_clk: pcie_bus { > > > compatible = "fixed-clock"; > > > @@ -2347,6 +2368,18 @@ gic: interrupt-controller@f1010000 { > > > resets = <&cpg 408>; > > > }; > > > > > > + gpu@fd000000 { > > > + compatible = "img,powervr-series6xt"; > > > + reg = <0 0xfd000000 0 0x40000>; > > > + interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>; > > > + clocks = <&cpg CPG_MOD 112>, <&cpg CPG_MOD 112>,<&cpg CPG_MOD 112>; > > > + clock-names = "core", "mem", "sys"; > > > + interrupt-names = "gpu"; > > > + operating-points-v2 = <&gpu_opp_table>; > > > + power-domains = <&sysc R8A774A1_PD_3DG_B>; > > > + resets = <&cpg 112>; > > > + }; > > > + > > > pciec0: pcie@fe000000 { > > > compatible = "renesas,pcie-r8a774a1", > > > "renesas,pcie-rcar-gen3"; > > > > LGTM. But obviously I cannot take this as-is, as there are no DT bindings > > for this device, and it didn't work for you... > > It was mostly to follow up to the previous ones with links for the > mainline Rogue video driver in the hopes that someone from Renesas > might have some input on whether or not Renesas might be able to > support this and have a discussion. I knew when I submitted it that > it wouldn't be accepted which is why I posted it as an RFC. > If I address concerns you have in the previous patches, would you be > OK with me submitting then as a formal patch to at least get the rest > of the system ready in the event the GPU driver/firmware becomes > available? It seems harmless, but I also see the argument that it's > dead code without the GPU node. The clock patches are almost there, and I'm happy to accept them when the last rough edges have been removed. > If not, I'll shelve this for now, and hope to get some responses from Renesas. Good luck! ;-) Gr{oetje,eeting}s, Geert
diff --git a/arch/arm64/boot/dts/renesas/r8a774a1.dtsi b/arch/arm64/boot/dts/renesas/r8a774a1.dtsi index c21b78685123..7e5816113a3c 100644 --- a/arch/arm64/boot/dts/renesas/r8a774a1.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a774a1.dtsi @@ -226,6 +226,27 @@ extalr_clk: extalr { clock-frequency = <0>; }; + gpu_opp_table: opp-table { + compatible = "operating-points-v2"; + + opp-200000000 { + opp-hz = /bits/ 64 <200000000>; + opp-microvolt = <830000>; + }; + opp-300000000 { + opp-hz = /bits/ 64 <300000000>; + opp-microvolt = <830000>; + }; + opp-400000000 { + opp-hz = /bits/ 64 <400000000>; + opp-microvolt = <830000>; + }; + opp-600000000 { + opp-hz = /bits/ 64 <600000000>; + opp-microvolt = <830000>; + }; + }; + /* External PCIe clock - can be overridden by the board */ pcie_bus_clk: pcie_bus { compatible = "fixed-clock"; @@ -2347,6 +2368,18 @@ gic: interrupt-controller@f1010000 { resets = <&cpg 408>; }; + gpu@fd000000 { + compatible = "img,powervr-series6xt"; + reg = <0 0xfd000000 0 0x40000>; + interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 112>, <&cpg CPG_MOD 112>,<&cpg CPG_MOD 112>; + clock-names = "core", "mem", "sys"; + interrupt-names = "gpu"; + operating-points-v2 = <&gpu_opp_table>; + power-domains = <&sysc R8A774A1_PD_3DG_B>; + resets = <&cpg 112>; + }; + pciec0: pcie@fe000000 { compatible = "renesas,pcie-r8a774a1", "renesas,pcie-rcar-gen3";
With the 3dge and ZG clocks now available, the generic GPU node can be added. Until proper firmware is made, it is not usable. Signed-off-by: Adam Ford <aford173@gmail.com> --- This is based on the assumption that the Rogue 6250 could use generic driver [1] and firmware [2] being implemebted by the Mesa group and others. In practice, the firmware isn't really compatible since the 6250 in the RZ/G2M appears to be a different variant. [1] - https://gitlab.freedesktop.org/frankbinns/powervr/-/tree/powervr-next [2] - https://gitlab.freedesktop.org/frankbinns/linux-firmware/-/tree/powervr/powervr