| Message ID | 20230619100121.27534-4-puranjay12@gmail.com (mailing list archive) |
|---|---|
| State | Superseded |
| Commit | 49703aa2adfaff2805dc08d3ce4ccb3e0056cb32 |
| Delegated to: | BPF |
| Headers | show |
| Series | bpf, arm64: use BPF prog pack allocator in BPF JIT | expand |
On Mon, Jun 19, 2023 at 3:01 AM Puranjay Mohan <puranjay12@gmail.com> wrote: > > Use bpf_jit_binary_pack_alloc for memory management of JIT binaries in > ARM64 BPF JIT. The bpf_jit_binary_pack_alloc creates a pair of RW and RX > buffers. The JIT writes the program into the RW buffer. When the JIT is > done, the program is copied to the final RX buffer > with bpf_jit_binary_pack_finalize. > > Implement bpf_arch_text_copy() and bpf_arch_text_invalidate() for ARM64 > JIT as these functions are required by bpf_jit_binary_pack allocator. > > Signed-off-by: Puranjay Mohan <puranjay12@gmail.com> LGTM! Thanks! Acked-by: Song Liu <song@kernel.org>
On Mon, Jun 19, 2023 at 10:01:21AM +0000, Puranjay Mohan wrote: > Use bpf_jit_binary_pack_alloc for memory management of JIT binaries in > ARM64 BPF JIT. The bpf_jit_binary_pack_alloc creates a pair of RW and RX > buffers. The JIT writes the program into the RW buffer. When the JIT is > done, the program is copied to the final RX buffer > with bpf_jit_binary_pack_finalize. > > Implement bpf_arch_text_copy() and bpf_arch_text_invalidate() for ARM64 > JIT as these functions are required by bpf_jit_binary_pack allocator. > > Signed-off-by: Puranjay Mohan <puranjay12@gmail.com> From a quick look, I don't beleive the I-cache maintenance is quite right -- explanation below. > @@ -1562,34 +1610,39 @@ struct bpf_prog *bpf_int_jit_compile(struct bpf_prog *prog) > > /* 3. Extra pass to validate JITed code. */ > if (validate_ctx(&ctx)) { > - bpf_jit_binary_free(header); > prog = orig_prog; > - goto out_off; > + goto out_free_hdr; > } > > /* And we're done. */ > if (bpf_jit_enable > 1) > bpf_jit_dump(prog->len, prog_size, 2, ctx.image); > > - bpf_flush_icache(header, ctx.image + ctx.idx); > + bpf_flush_icache(ro_header, ctx.ro_image + ctx.idx); I think this is too early; we haven't copied the instructions into the ro_header yet, so that still contains stale instructions. IIUC at the whole point of this is to pack multiple programs into shared ROX pages, and so there can be an executable mapping of the RO page at this point, and the CPU can fetch stale instructions throught that. Note that *regardless* of whether there is an executeable mapping at this point (and even if no executable mapping exists until after the copy), we at least need a data cache clean to the PoU *after* the copy (so fetches don't get a stale value from the PoU), and the I-cache maintenance has to happeon the VA the instrutions will be executed from (or VIPT I-caches can still contain stale instructions). Thanks, Mark. > > if (!prog->is_func || extra_pass) { > if (extra_pass && ctx.idx != jit_data->ctx.idx) { > pr_err_once("multi-func JIT bug %d != %d\n", > ctx.idx, jit_data->ctx.idx); > - bpf_jit_binary_free(header); > prog->bpf_func = NULL; > prog->jited = 0; > prog->jited_len = 0; > + goto out_free_hdr; > + } > + if (WARN_ON(bpf_jit_binary_pack_finalize(prog, ro_header, > + header))) { > + /* ro_header has been freed */ > + ro_header = NULL; > + prog = orig_prog; > goto out_off; > } > - bpf_jit_binary_lock_ro(header); > } else { > jit_data->ctx = ctx; > - jit_data->image = image_ptr; > + jit_data->ro_image = ro_image_ptr; > jit_data->header = header; > + jit_data->ro_header = ro_header; > } > - prog->bpf_func = (void *)ctx.image; > + prog->bpf_func = (void *)ctx.ro_image; > prog->jited = 1; > prog->jited_len = prog_size; > > @@ -1610,6 +1663,14 @@ struct bpf_prog *bpf_int_jit_compile(struct bpf_prog *prog) > bpf_jit_prog_release_other(prog, prog == orig_prog ? > tmp : orig_prog); > return prog; > + > +out_free_hdr: > + if (header) { > + bpf_arch_text_copy(&ro_header->size, &header->size, > + sizeof(header->size)); > + bpf_jit_binary_pack_free(ro_header, header); > + } > + goto out_off; > } > > bool bpf_jit_supports_kfunc_call(void) > @@ -1617,6 +1678,13 @@ bool bpf_jit_supports_kfunc_call(void) > return true; > } > > +void *bpf_arch_text_copy(void *dst, void *src, size_t len) > +{ > + if (!aarch64_insn_copy(dst, src, len)) > + return ERR_PTR(-EINVAL); > + return dst; > +} > + > u64 bpf_jit_alloc_exec_limit(void) > { > return VMALLOC_END - VMALLOC_START; > @@ -2221,3 +2289,27 @@ int bpf_arch_text_poke(void *ip, enum bpf_text_poke_type poke_type, > > return ret; > } > + > +void bpf_jit_free(struct bpf_prog *prog) > +{ > + if (prog->jited) { > + struct arm64_jit_data *jit_data = prog->aux->jit_data; > + struct bpf_binary_header *hdr; > + > + /* > + * If we fail the final pass of JIT (from jit_subprogs), > + * the program may not be finalized yet. Call finalize here > + * before freeing it. > + */ > + if (jit_data) { > + bpf_jit_binary_pack_finalize(prog, jit_data->ro_header, > + jit_data->header); > + kfree(jit_data); > + } > + hdr = bpf_jit_binary_pack_hdr(prog); > + bpf_jit_binary_pack_free(hdr, NULL); > + WARN_ON_ONCE(!bpf_prog_kallsyms_verify_off(prog)); > + } > + > + bpf_prog_unlock_free(prog); > +} > -- > 2.40.1 >
On Wed, Jun 21, 2023 at 8:31 AM Mark Rutland <mark.rutland@arm.com> wrote: > > On Mon, Jun 19, 2023 at 10:01:21AM +0000, Puranjay Mohan wrote: > > Use bpf_jit_binary_pack_alloc for memory management of JIT binaries in > > ARM64 BPF JIT. The bpf_jit_binary_pack_alloc creates a pair of RW and RX > > buffers. The JIT writes the program into the RW buffer. When the JIT is > > done, the program is copied to the final RX buffer > > with bpf_jit_binary_pack_finalize. > > > > Implement bpf_arch_text_copy() and bpf_arch_text_invalidate() for ARM64 > > JIT as these functions are required by bpf_jit_binary_pack allocator. > > > > Signed-off-by: Puranjay Mohan <puranjay12@gmail.com> > > From a quick look, I don't beleive the I-cache maintenance is quite right -- > explanation below. > > > @@ -1562,34 +1610,39 @@ struct bpf_prog *bpf_int_jit_compile(struct bpf_prog *prog) > > > > /* 3. Extra pass to validate JITed code. */ > > if (validate_ctx(&ctx)) { > > - bpf_jit_binary_free(header); > > prog = orig_prog; > > - goto out_off; > > + goto out_free_hdr; > > } > > > > /* And we're done. */ > > if (bpf_jit_enable > 1) > > bpf_jit_dump(prog->len, prog_size, 2, ctx.image); > > > > - bpf_flush_icache(header, ctx.image + ctx.idx); > > + bpf_flush_icache(ro_header, ctx.ro_image + ctx.idx); > > I think this is too early; we haven't copied the instructions into the > ro_header yet, so that still contains stale instructions. > > IIUC at the whole point of this is to pack multiple programs into shared ROX > pages, and so there can be an executable mapping of the RO page at this point, > and the CPU can fetch stale instructions throught that. > > Note that *regardless* of whether there is an executeable mapping at this point > (and even if no executable mapping exists until after the copy), we at least > need a data cache clean to the PoU *after* the copy (so fetches don't get a > stale value from the PoU), and the I-cache maintenance has to happeon the VA > the instrutions will be executed from (or VIPT I-caches can still contain stale > instructions). Good catch. Also considering the boot issue reported in the other thread I removed this series from bpf-next. Looks like another respin is necessary.
Hi Mark, On Wed, Jun 21, 2023 at 5:31 PM Mark Rutland <mark.rutland@arm.com> wrote: > > On Mon, Jun 19, 2023 at 10:01:21AM +0000, Puranjay Mohan wrote: > > Use bpf_jit_binary_pack_alloc for memory management of JIT binaries in > > ARM64 BPF JIT. The bpf_jit_binary_pack_alloc creates a pair of RW and RX > > buffers. The JIT writes the program into the RW buffer. When the JIT is > > done, the program is copied to the final RX buffer > > with bpf_jit_binary_pack_finalize. > > > > Implement bpf_arch_text_copy() and bpf_arch_text_invalidate() for ARM64 > > JIT as these functions are required by bpf_jit_binary_pack allocator. > > > > Signed-off-by: Puranjay Mohan <puranjay12@gmail.com> > > From a quick look, I don't beleive the I-cache maintenance is quite right -- > explanation below. > > > @@ -1562,34 +1610,39 @@ struct bpf_prog *bpf_int_jit_compile(struct bpf_prog *prog) > > > > /* 3. Extra pass to validate JITed code. */ > > if (validate_ctx(&ctx)) { > > - bpf_jit_binary_free(header); > > prog = orig_prog; > > - goto out_off; > > + goto out_free_hdr; > > } > > > > /* And we're done. */ > > if (bpf_jit_enable > 1) > > bpf_jit_dump(prog->len, prog_size, 2, ctx.image); > > > > - bpf_flush_icache(header, ctx.image + ctx.idx); > > + bpf_flush_icache(ro_header, ctx.ro_image + ctx.idx); > > I think this is too early; we haven't copied the instructions into the > ro_header yet, so that still contains stale instructions. > > IIUC at the whole point of this is to pack multiple programs into shared ROX > pages, and so there can be an executable mapping of the RO page at this point, > and the CPU can fetch stale instructions throught that. > > Note that *regardless* of whether there is an executeable mapping at this point > (and even if no executable mapping exists until after the copy), we at least > need a data cache clean to the PoU *after* the copy (so fetches don't get a > stale value from the PoU), and the I-cache maintenance has to happeon the VA > the instrutions will be executed from (or VIPT I-caches can still contain stale > instructions). Thanks for catching this, It is a big miss from my side. I was able to reproduce the boot issue in the other thread on my raspberry pi. I think it is connected to the wrong I-cache handling done by me. As you rightly pointed out: We need to do bpf_flush_icache() after copying the instructions to the ro_header or the CPU can run incorrect instructions. When I move the call to bpf_flush_icache() after bpf_jit_binary_pack_finalize() (this does the copy to ro_header), the boot issue is fixed. Would this change be enough to make this work or I would need to do more with the data cache as well to catch other edge cases? Thanks, Puranjay > > Thanks, > Mark. > > > > > if (!prog->is_func || extra_pass) { > > if (extra_pass && ctx.idx != jit_data->ctx.idx) { > > pr_err_once("multi-func JIT bug %d != %d\n", > > ctx.idx, jit_data->ctx.idx); > > - bpf_jit_binary_free(header); > > prog->bpf_func = NULL; > > prog->jited = 0; > > prog->jited_len = 0; > > + goto out_free_hdr; > > + } > > + if (WARN_ON(bpf_jit_binary_pack_finalize(prog, ro_header, > > + header))) { > > + /* ro_header has been freed */ > > + ro_header = NULL; > > + prog = orig_prog; > > goto out_off; > > } > > - bpf_jit_binary_lock_ro(header); > > } else { > > jit_data->ctx = ctx; > > - jit_data->image = image_ptr; > > + jit_data->ro_image = ro_image_ptr; > > jit_data->header = header; > > + jit_data->ro_header = ro_header; > > } > > - prog->bpf_func = (void *)ctx.image; > > + prog->bpf_func = (void *)ctx.ro_image; > > prog->jited = 1; > > prog->jited_len = prog_size; > > > > @@ -1610,6 +1663,14 @@ struct bpf_prog *bpf_int_jit_compile(struct bpf_prog *prog) > > bpf_jit_prog_release_other(prog, prog == orig_prog ? > > tmp : orig_prog); > > return prog; > > + > > +out_free_hdr: > > + if (header) { > > + bpf_arch_text_copy(&ro_header->size, &header->size, > > + sizeof(header->size)); > > + bpf_jit_binary_pack_free(ro_header, header); > > + } > > + goto out_off; > > } > > > > bool bpf_jit_supports_kfunc_call(void) > > @@ -1617,6 +1678,13 @@ bool bpf_jit_supports_kfunc_call(void) > > return true; > > } > > > > +void *bpf_arch_text_copy(void *dst, void *src, size_t len) > > +{ > > + if (!aarch64_insn_copy(dst, src, len)) > > + return ERR_PTR(-EINVAL); > > + return dst; > > +} > > + > > u64 bpf_jit_alloc_exec_limit(void) > > { > > return VMALLOC_END - VMALLOC_START; > > @@ -2221,3 +2289,27 @@ int bpf_arch_text_poke(void *ip, enum bpf_text_poke_type poke_type, > > > > return ret; > > } > > + > > +void bpf_jit_free(struct bpf_prog *prog) > > +{ > > + if (prog->jited) { > > + struct arm64_jit_data *jit_data = prog->aux->jit_data; > > + struct bpf_binary_header *hdr; > > + > > + /* > > + * If we fail the final pass of JIT (from jit_subprogs), > > + * the program may not be finalized yet. Call finalize here > > + * before freeing it. > > + */ > > + if (jit_data) { > > + bpf_jit_binary_pack_finalize(prog, jit_data->ro_header, > > + jit_data->header); > > + kfree(jit_data); > > + } > > + hdr = bpf_jit_binary_pack_hdr(prog); > > + bpf_jit_binary_pack_free(hdr, NULL); > > + WARN_ON_ONCE(!bpf_prog_kallsyms_verify_off(prog)); > > + } > > + > > + bpf_prog_unlock_free(prog); > > +} > > -- > > 2.40.1 > >
On Wed, Jun 21, 2023 at 10:57:20PM +0200, Puranjay Mohan wrote: > On Wed, Jun 21, 2023 at 5:31 PM Mark Rutland <mark.rutland@arm.com> wrote: > > On Mon, Jun 19, 2023 at 10:01:21AM +0000, Puranjay Mohan wrote: > > > @@ -1562,34 +1610,39 @@ struct bpf_prog *bpf_int_jit_compile(struct bpf_prog *prog) > > > > > > /* 3. Extra pass to validate JITed code. */ > > > if (validate_ctx(&ctx)) { > > > - bpf_jit_binary_free(header); > > > prog = orig_prog; > > > - goto out_off; > > > + goto out_free_hdr; > > > } > > > > > > /* And we're done. */ > > > if (bpf_jit_enable > 1) > > > bpf_jit_dump(prog->len, prog_size, 2, ctx.image); > > > > > > - bpf_flush_icache(header, ctx.image + ctx.idx); > > > + bpf_flush_icache(ro_header, ctx.ro_image + ctx.idx); > > > > I think this is too early; we haven't copied the instructions into the > > ro_header yet, so that still contains stale instructions. > > > > IIUC at the whole point of this is to pack multiple programs into shared ROX > > pages, and so there can be an executable mapping of the RO page at this point, > > and the CPU can fetch stale instructions throught that. > > > > Note that *regardless* of whether there is an executeable mapping at this point > > (and even if no executable mapping exists until after the copy), we at least > > need a data cache clean to the PoU *after* the copy (so fetches don't get a > > stale value from the PoU), and the I-cache maintenance has to happeon the VA > > the instrutions will be executed from (or VIPT I-caches can still contain stale > > instructions). > > Thanks for catching this, It is a big miss from my side. > > I was able to reproduce the boot issue in the other thread on my > raspberry pi. I think it is connected to the > wrong I-cache handling done by me. > > As you rightly pointed out: We need to do bpf_flush_icache() after > copying the instructions to the ro_header or the CPU can run > incorrect instructions. > > When I move the call to bpf_flush_icache() after > bpf_jit_binary_pack_finalize() (this does the copy to ro_header), the > boot issue > is fixed. Would this change be enough to make this work or I would > need to do more with the data cache as well to catch other > edge cases? AFAICT, bpf_flush_icache() calls flush_icache_range(). Despite its name, flush_icache_range() has d-cache maintenance, i-cache maintenance, and context synchronization (i.e. it does everything necessary). As long as you call that with the VAs the code will be executed from, that should be sufficient, and you don't need to do any other work. Thanks, Mark.
Hi Mark, On Thu, Jun 22, 2023 at 10:23 AM Mark Rutland <mark.rutland@arm.com> wrote: > > On Wed, Jun 21, 2023 at 10:57:20PM +0200, Puranjay Mohan wrote: > > On Wed, Jun 21, 2023 at 5:31 PM Mark Rutland <mark.rutland@arm.com> wrote: > > > On Mon, Jun 19, 2023 at 10:01:21AM +0000, Puranjay Mohan wrote: > > > > @@ -1562,34 +1610,39 @@ struct bpf_prog *bpf_int_jit_compile(struct bpf_prog *prog) > > > > > > > > /* 3. Extra pass to validate JITed code. */ > > > > if (validate_ctx(&ctx)) { > > > > - bpf_jit_binary_free(header); > > > > prog = orig_prog; > > > > - goto out_off; > > > > + goto out_free_hdr; > > > > } > > > > > > > > /* And we're done. */ > > > > if (bpf_jit_enable > 1) > > > > bpf_jit_dump(prog->len, prog_size, 2, ctx.image); > > > > > > > > - bpf_flush_icache(header, ctx.image + ctx.idx); > > > > + bpf_flush_icache(ro_header, ctx.ro_image + ctx.idx); > > > > > > I think this is too early; we haven't copied the instructions into the > > > ro_header yet, so that still contains stale instructions. > > > > > > IIUC at the whole point of this is to pack multiple programs into shared ROX > > > pages, and so there can be an executable mapping of the RO page at this point, > > > and the CPU can fetch stale instructions throught that. > > > > > > Note that *regardless* of whether there is an executeable mapping at this point > > > (and even if no executable mapping exists until after the copy), we at least > > > need a data cache clean to the PoU *after* the copy (so fetches don't get a > > > stale value from the PoU), and the I-cache maintenance has to happeon the VA > > > the instrutions will be executed from (or VIPT I-caches can still contain stale > > > instructions). > > > > Thanks for catching this, It is a big miss from my side. > > > > I was able to reproduce the boot issue in the other thread on my > > raspberry pi. I think it is connected to the > > wrong I-cache handling done by me. > > > > As you rightly pointed out: We need to do bpf_flush_icache() after > > copying the instructions to the ro_header or the CPU can run > > incorrect instructions. > > > > When I move the call to bpf_flush_icache() after > > bpf_jit_binary_pack_finalize() (this does the copy to ro_header), the > > boot issue > > is fixed. Would this change be enough to make this work or I would > > need to do more with the data cache as well to catch other > > edge cases? > > AFAICT, bpf_flush_icache() calls flush_icache_range(). Despite its name, > flush_icache_range() has d-cache maintenance, i-cache maintenance, and context > synchronization (i.e. it does everything necessary). > > As long as you call that with the VAs the code will be executed from, that > should be sufficient, and you don't need to do any other work. Thanks for explaining this. After reading your explanation, I feel this should work. bpf_jit_binary_pack_finalize() will copy the instructions from rw_header to ro_header. After the copy, calling bpf_flush_icache(ro_header, ctx.ro_image + ctx.idx); will invalidate the caches for the VAs in the ro_header, this is where the code will be executed from. I will send the v4 patchset with this change. Thanks, Puranjay
On Thu, Jun 22, 2023 at 10:47:08AM +0200, Puranjay Mohan wrote: > On Thu, Jun 22, 2023 at 10:23 AM Mark Rutland <mark.rutland@arm.com> wrote: > > On Wed, Jun 21, 2023 at 10:57:20PM +0200, Puranjay Mohan wrote: > > > When I move the call to bpf_flush_icache() after > > > bpf_jit_binary_pack_finalize() (this does the copy to ro_header), the > > > boot issue is fixed. Would this change be enough to make this work or I > > > would need to do more with the data cache as well to catch other edge > > > cases? > > > > AFAICT, bpf_flush_icache() calls flush_icache_range(). Despite its name, > > flush_icache_range() has d-cache maintenance, i-cache maintenance, and context > > synchronization (i.e. it does everything necessary). > > > > As long as you call that with the VAs the code will be executed from, that > > should be sufficient, and you don't need to do any other work. > > Thanks for explaining this. > After reading your explanation, I feel this should work. > > bpf_jit_binary_pack_finalize() will copy the instructions from > rw_header to ro_header. > After the copy, calling bpf_flush_icache(ro_header, ctx.ro_image + > ctx.idx); will invalidate the caches > for the VAs in the ro_header, this is where the code will be executed from. > > I will send the v4 patchset with this change. Sure -- I'll be happy to review that. Mark.
diff --git a/arch/arm64/net/bpf_jit_comp.c b/arch/arm64/net/bpf_jit_comp.c index 145b540ec34f..b781e42878c8 100644 --- a/arch/arm64/net/bpf_jit_comp.c +++ b/arch/arm64/net/bpf_jit_comp.c @@ -76,6 +76,7 @@ struct jit_ctx { int *offset; int exentry_idx; __le32 *image; + __le32 *ro_image; u32 stack_size; int fpb_offset; }; @@ -205,6 +206,20 @@ static void jit_fill_hole(void *area, unsigned int size) *ptr++ = cpu_to_le32(AARCH64_BREAK_FAULT); } +int bpf_arch_text_invalidate(void *dst, size_t len) +{ + __le32 *ptr; + int ret; + + for (ptr = dst; len >= sizeof(u32); len -= sizeof(u32)) { + ret = aarch64_insn_patch_text_nosync(ptr++, AARCH64_BREAK_FAULT); + if (ret) + return ret; + } + + return 0; +} + static inline int epilogue_offset(const struct jit_ctx *ctx) { int to = ctx->epilogue_offset; @@ -701,7 +716,8 @@ static int add_exception_handler(const struct bpf_insn *insn, struct jit_ctx *ctx, int dst_reg) { - off_t offset; + off_t ins_offset; + off_t fixup_offset; unsigned long pc; struct exception_table_entry *ex; @@ -717,12 +733,17 @@ static int add_exception_handler(const struct bpf_insn *insn, return -EINVAL; ex = &ctx->prog->aux->extable[ctx->exentry_idx]; - pc = (unsigned long)&ctx->image[ctx->idx - 1]; + pc = (unsigned long)&ctx->ro_image[ctx->idx - 1]; - offset = pc - (long)&ex->insn; - if (WARN_ON_ONCE(offset >= 0 || offset < INT_MIN)) + /* + * This is the relative offset of the instruction that may fault from + * the exception table itself. This will be written to the exception + * table and if this instruction faults, the destination register will + * be set to '0' and the execution will jump to the next instruction. + */ + ins_offset = pc - (long)&ex->insn; + if (WARN_ON_ONCE(ins_offset >= 0 || ins_offset < INT_MIN)) return -ERANGE; - ex->insn = offset; /* * Since the extable follows the program, the fixup offset is always @@ -731,12 +752,25 @@ static int add_exception_handler(const struct bpf_insn *insn, * bits. We don't need to worry about buildtime or runtime sort * modifying the upper bits because the table is already sorted, and * isn't part of the main exception table. + * + * The fixup_offset is set to the next instruction from the instruction + * that may fault. The execution will jump to this after handling the + * fault. */ - offset = (long)&ex->fixup - (pc + AARCH64_INSN_SIZE); - if (!FIELD_FIT(BPF_FIXUP_OFFSET_MASK, offset)) + fixup_offset = (long)&ex->fixup - (pc + AARCH64_INSN_SIZE); + if (!FIELD_FIT(BPF_FIXUP_OFFSET_MASK, fixup_offset)) return -ERANGE; - ex->fixup = FIELD_PREP(BPF_FIXUP_OFFSET_MASK, offset) | + /* + * The offsets above have been calculated using the RO buffer but we + * need to use the R/W buffer for writes. + * switch ex to rw buffer for writing. + */ + ex = (void *)ctx->image + ((void *)ex - (void *)ctx->ro_image); + + ex->insn = ins_offset; + + ex->fixup = FIELD_PREP(BPF_FIXUP_OFFSET_MASK, fixup_offset) | FIELD_PREP(BPF_FIXUP_REG_MASK, dst_reg); ex->type = EX_TYPE_BPF; @@ -1446,7 +1480,8 @@ static inline void bpf_flush_icache(void *start, void *end) struct arm64_jit_data { struct bpf_binary_header *header; - u8 *image; + u8 *ro_image; + struct bpf_binary_header *ro_header; struct jit_ctx ctx; }; @@ -1455,12 +1490,14 @@ struct bpf_prog *bpf_int_jit_compile(struct bpf_prog *prog) int image_size, prog_size, extable_size, extable_align, extable_offset; struct bpf_prog *tmp, *orig_prog = prog; struct bpf_binary_header *header; + struct bpf_binary_header *ro_header; struct arm64_jit_data *jit_data; bool was_classic = bpf_prog_was_classic(prog); bool tmp_blinded = false; bool extra_pass = false; struct jit_ctx ctx; u8 *image_ptr; + u8 *ro_image_ptr; if (!prog->jit_requested) return orig_prog; @@ -1487,8 +1524,11 @@ struct bpf_prog *bpf_int_jit_compile(struct bpf_prog *prog) } if (jit_data->ctx.offset) { ctx = jit_data->ctx; - image_ptr = jit_data->image; + ro_image_ptr = jit_data->ro_image; + ro_header = jit_data->ro_header; header = jit_data->header; + image_ptr = (void *)header + ((void *)ro_image_ptr + - (void *)ro_header); extra_pass = true; prog_size = sizeof(u32) * ctx.idx; goto skip_init_ctx; @@ -1533,18 +1573,27 @@ struct bpf_prog *bpf_int_jit_compile(struct bpf_prog *prog) /* also allocate space for plt target */ extable_offset = round_up(prog_size + PLT_TARGET_SIZE, extable_align); image_size = extable_offset + extable_size; - header = bpf_jit_binary_alloc(image_size, &image_ptr, - sizeof(u32), jit_fill_hole); - if (header == NULL) { + ro_header = bpf_jit_binary_pack_alloc(image_size, &ro_image_ptr, + sizeof(u32), &header, &image_ptr, + jit_fill_hole); + if (!ro_header) { prog = orig_prog; goto out_off; } /* 2. Now, the actual pass. */ + /* + * Use the image(RW) for writing the JITed instructions. But also save + * the ro_image(RX) for calculating the offsets in the image. The RW + * image will be later copied to the RX image from where the program + * will run. The bpf_jit_binary_pack_finalize() will do this copy in the + * final step. + */ ctx.image = (__le32 *)image_ptr; + ctx.ro_image = (__le32 *)ro_image_ptr; if (extable_size) - prog->aux->extable = (void *)image_ptr + extable_offset; + prog->aux->extable = (void *)ro_image_ptr + extable_offset; skip_init_ctx: ctx.idx = 0; ctx.exentry_idx = 0; @@ -1552,9 +1601,8 @@ struct bpf_prog *bpf_int_jit_compile(struct bpf_prog *prog) build_prologue(&ctx, was_classic); if (build_body(&ctx, extra_pass)) { - bpf_jit_binary_free(header); prog = orig_prog; - goto out_off; + goto out_free_hdr; } build_epilogue(&ctx); @@ -1562,34 +1610,39 @@ struct bpf_prog *bpf_int_jit_compile(struct bpf_prog *prog) /* 3. Extra pass to validate JITed code. */ if (validate_ctx(&ctx)) { - bpf_jit_binary_free(header); prog = orig_prog; - goto out_off; + goto out_free_hdr; } /* And we're done. */ if (bpf_jit_enable > 1) bpf_jit_dump(prog->len, prog_size, 2, ctx.image); - bpf_flush_icache(header, ctx.image + ctx.idx); + bpf_flush_icache(ro_header, ctx.ro_image + ctx.idx); if (!prog->is_func || extra_pass) { if (extra_pass && ctx.idx != jit_data->ctx.idx) { pr_err_once("multi-func JIT bug %d != %d\n", ctx.idx, jit_data->ctx.idx); - bpf_jit_binary_free(header); prog->bpf_func = NULL; prog->jited = 0; prog->jited_len = 0; + goto out_free_hdr; + } + if (WARN_ON(bpf_jit_binary_pack_finalize(prog, ro_header, + header))) { + /* ro_header has been freed */ + ro_header = NULL; + prog = orig_prog; goto out_off; } - bpf_jit_binary_lock_ro(header); } else { jit_data->ctx = ctx; - jit_data->image = image_ptr; + jit_data->ro_image = ro_image_ptr; jit_data->header = header; + jit_data->ro_header = ro_header; } - prog->bpf_func = (void *)ctx.image; + prog->bpf_func = (void *)ctx.ro_image; prog->jited = 1; prog->jited_len = prog_size; @@ -1610,6 +1663,14 @@ struct bpf_prog *bpf_int_jit_compile(struct bpf_prog *prog) bpf_jit_prog_release_other(prog, prog == orig_prog ? tmp : orig_prog); return prog; + +out_free_hdr: + if (header) { + bpf_arch_text_copy(&ro_header->size, &header->size, + sizeof(header->size)); + bpf_jit_binary_pack_free(ro_header, header); + } + goto out_off; } bool bpf_jit_supports_kfunc_call(void) @@ -1617,6 +1678,13 @@ bool bpf_jit_supports_kfunc_call(void) return true; } +void *bpf_arch_text_copy(void *dst, void *src, size_t len) +{ + if (!aarch64_insn_copy(dst, src, len)) + return ERR_PTR(-EINVAL); + return dst; +} + u64 bpf_jit_alloc_exec_limit(void) { return VMALLOC_END - VMALLOC_START; @@ -2221,3 +2289,27 @@ int bpf_arch_text_poke(void *ip, enum bpf_text_poke_type poke_type, return ret; } + +void bpf_jit_free(struct bpf_prog *prog) +{ + if (prog->jited) { + struct arm64_jit_data *jit_data = prog->aux->jit_data; + struct bpf_binary_header *hdr; + + /* + * If we fail the final pass of JIT (from jit_subprogs), + * the program may not be finalized yet. Call finalize here + * before freeing it. + */ + if (jit_data) { + bpf_jit_binary_pack_finalize(prog, jit_data->ro_header, + jit_data->header); + kfree(jit_data); + } + hdr = bpf_jit_binary_pack_hdr(prog); + bpf_jit_binary_pack_free(hdr, NULL); + WARN_ON_ONCE(!bpf_prog_kallsyms_verify_off(prog)); + } + + bpf_prog_unlock_free(prog); +}
Use bpf_jit_binary_pack_alloc for memory management of JIT binaries in ARM64 BPF JIT. The bpf_jit_binary_pack_alloc creates a pair of RW and RX buffers. The JIT writes the program into the RW buffer. When the JIT is done, the program is copied to the final RX buffer with bpf_jit_binary_pack_finalize. Implement bpf_arch_text_copy() and bpf_arch_text_invalidate() for ARM64 JIT as these functions are required by bpf_jit_binary_pack allocator. Signed-off-by: Puranjay Mohan <puranjay12@gmail.com> --- Changes in v2 => v3: - Set prog = orig_prog; in the failure path of bpf_jit_binary_pack_finalize() call. - Add comments explaining the usage of the offsets in the exception table. Changes in v1 => v2: - Made the naming of ro_ prefix consistent. Now image/header/image_ptr are read/write and ro_image/ro_header/ro_image_ptr are read-only. arch/arm64/net/bpf_jit_comp.c | 138 ++++++++++++++++++++++++++++------ 1 file changed, 115 insertions(+), 23 deletions(-)