Message ID | 20230702174246.121656-1-dmitry.baryshkov@linaro.org (mailing list archive) |
---|---|
Headers | show |
Series | ARM: qcom: apq8064: support CPU frequency scaling | expand |
On 02-07-23, 20:42, Dmitry Baryshkov wrote: > Implement CPUFreq support for one of the oldest supported Qualcomm > platforms, APQ8064. Each core has independent power and frequency > control. Additionally the L2 cache is scaled to follow the CPU > frequencies (failure to do so results in strange semi-random crashes). > > Core voltage is controlled through the SAW2 devices, one for each core. > The L2 has two regulators, vdd-mem and vdd-dig. Is it possible to send the cpufreq/opp patches separately so I can apply directly ?
On Sun, Jul 2, 2023 at 7:43 PM Dmitry Baryshkov <dmitry.baryshkov@linaro.org> wrote: > Implement CPUFreq support for one of the oldest supported Qualcomm > platforms, APQ8064. Each core has independent power and frequency > control. Additionally the L2 cache is scaled to follow the CPU > frequencies (failure to do so results in strange semi-random crashes). > > Core voltage is controlled through the SAW2 devices, one for each core. > The L2 has two regulators, vdd-mem and vdd-dig. > > Dependencies: [1]. > > [1] https://lore.kernel.org/linux-arm-msm/20230702134320.98831-1-dmitry.baryshkov@linaro.org/ Just because it looks so cool, I applied this patches and the prerequisite to master and booted the result on the APQ8060 DragonBoard, and it still works. Tested-by: Linus Walleij <linus.walleij@linaro.org> (Mostly for the DTS refactoring, which is what affects APQ8060) I guess the APQ8064 cpufreq and APQ8060 isn't actually far apart, so it should be possible to fix APQ8060 as well, but we can take that another day. I always wanted to fix the SAW2 regulators. Yours, Linus Walleij
On Fri, 7 Jul 2023 at 12:34, Linus Walleij <linus.walleij@linaro.org> wrote: > > On Sun, Jul 2, 2023 at 7:43 PM Dmitry Baryshkov > <dmitry.baryshkov@linaro.org> wrote: > > > Implement CPUFreq support for one of the oldest supported Qualcomm > > platforms, APQ8064. Each core has independent power and frequency > > control. Additionally the L2 cache is scaled to follow the CPU > > frequencies (failure to do so results in strange semi-random crashes). > > > > Core voltage is controlled through the SAW2 devices, one for each core. > > The L2 has two regulators, vdd-mem and vdd-dig. > > > > Dependencies: [1]. > > > > [1] https://lore.kernel.org/linux-arm-msm/20230702134320.98831-1-dmitry.baryshkov@linaro.org/ > > Just because it looks so cool, I applied this patches and the prerequisite > to master and booted the result on the APQ8060 DragonBoard, and > it still works. > Tested-by: Linus Walleij <linus.walleij@linaro.org> > (Mostly for the DTS refactoring, which is what affects APQ8060) > > I guess the APQ8064 cpufreq and APQ8060 isn't actually far > apart, so it should be possible to fix APQ8060 as well, but we > can take that another day. I always wanted to fix the SAW2 > regulators. APQ8060 (as well as MSM8260 / MSM8660) were a previous generation of the cores, Scorpion vs Krait. So far it requires two items to work: SCPLL, the core pll driver, and the fixed AVS setting (which might also be required for MSM8960). Let me take a glance in the next couple of days.