| Message ID | 20230620201221.2580428-1-Frank.Li@nxp.com (mailing list archive) |
|---|---|
| Headers | show |
| Series | dmaengine: edma: add freescale edma v3 support | expand |
On Tue, Jun 20, 2023 at 04:12:08PM -0400, Frank Li wrote: > This patch series introduces support for the eDMA version 3 from > Freescale. The eDMA v3 brings alterations in the register layout, > particularly, the separation of channel control registers into > different channels. The Transfer Control Descriptor (TCD) layout, > however, remains identical with only the offset being changed. > > The first 11 patches aim at tidying up the existing Freescale > eDMA code and laying the groundwork for the integration of eDMA v3 > support. > > Patch 1-11: > These patches primarily focus on cleaning up and refactoring the existing > fsl_edma driver code. This is to accommodate the upcoming changes and new > features introduced with the eDMA v3. > > Patch 12: > This patch introduces support for eDMA v3. In addition, this patch has > been designed with an eye towards future upgradability, specifically for > transitioning to eDMA v5. The latter involves a significant upgrade > where the TCD address would need to support 64 bits. > > Patch 13: > This patch focuses on the device tree bindings and their modifications > to properly handle and integrate the changes brought about by eDMA v3 @vkoul: Do you have chance to check these patches? Any chance to come into 6.5 All audio parts of i.MX8x and i.MX9 was dependent on these patches. best regards Frank Li > > Change from v8 to v9 > - add dmaengine: fsl-edma: fix build error when arch is s390 > fix kernel test robot build issue > > Change from v7 to v8 > -dt-bind: add missed part > > clock-names: > > items: > > - const: dma > > > > clocks: > > maxItems: 1 > > Change from v6 to v7 > -dt-bind: remove "else" branch. > > Change from v5 to v6 > - dt-bind: rework it by fixed top level constraint. > > Change from v4 to v5 > - dt-bind, add example for imx93 to trigger make dt_binding_check to > generate the yaml error. fixed dt_binding_check error. > keep compatible string ordered alphabetically. > > Change from v3 to v4. > - use dma-channel-mask instead of fsl,channel-mask > - don't use dmamux after v3. only use flags to distinguish the IP > difference > - fixed 8qm and imx93 have not CH_MUX register. Previous can work > because dmamux is 0. > > Change from v2 to v3 > - dt-binding: add interrupt-names > - dt-binding: add minItems > - dt-binding: add missed property: fsl,channel-mask > - rework patch 4, removed edma_version to avoid confuse with hardware > IP version. > > Change from v1 to v2 > - fixed issue found by make DT_CHECKER_FLAGS=-m dt_binding_check > - fixed warning found by kernel test robot > > > Frank Li (13): > 1 dmaengine: fsl-edma: fix build error when arch is s390 > 2 dmaengine: fsl-edma: clean up EXPORT_SYMBOL_GPL in fsl-edma-common.c > 3 dmaengine: fsl-edma: clean up fsl_edma_irq_exit() > 4 dmaengine: fsl-edma: transition from bool fields to bitmask flags in > drvdata > 5 dmaengine: fsl-edma: Remove enum edma_version > 6 dmaengine: fsl-edma: move common IRQ handler to common.c > 7 dmaengine: fsl-edma: simply ATTR_DSIZE and ATTR_SSIZE by using ffs() > 8 dmaengine: fsl-edma: refactor using devm_clk_get_enabled > 9 dmaengine: fsl-edma: move clearing of register interrupt into > setup_irq function > 10 dmaengine: fsl-edma: refactor chan_name setup and safety > 11 dmaengine: fsl-edma: move tcd into struct fsl_dma_chan > 12 dmaengine: fsl-edma: integrate v3 support > 13 dt-bindings: fsl-dma: fsl-edma: add edma3 compatible string > > .../devicetree/bindings/dma/fsl,edma.yaml | 106 +++++- > drivers/dma/Kconfig | 2 +- > drivers/dma/Makefile | 6 +- > drivers/dma/fsl-edma-common.c | 308 +++++++++++------ > drivers/dma/fsl-edma-common.h | 127 +++++-- > drivers/dma/{fsl-edma.c => fsl-edma-main.c} | 320 ++++++++++++++---- > drivers/dma/{mcf-edma.c => mcf-edma-main.c} | 36 +- > 7 files changed, 677 insertions(+), 228 deletions(-) > rename drivers/dma/{fsl-edma.c => fsl-edma-main.c} (62%) > rename drivers/dma/{mcf-edma.c => mcf-edma-main.c} (90%) > > -- > 2.34.1 >
On 28/06/2023 16:45, Frank Li wrote: > On Tue, Jun 20, 2023 at 04:12:08PM -0400, Frank Li wrote: >> This patch series introduces support for the eDMA version 3 from >> Freescale. The eDMA v3 brings alterations in the register layout, >> particularly, the separation of channel control registers into >> different channels. The Transfer Control Descriptor (TCD) layout, >> however, remains identical with only the offset being changed. >> >> The first 11 patches aim at tidying up the existing Freescale >> eDMA code and laying the groundwork for the integration of eDMA v3 >> support. >> >> Patch 1-11: >> These patches primarily focus on cleaning up and refactoring the existing >> fsl_edma driver code. This is to accommodate the upcoming changes and new >> features introduced with the eDMA v3. >> >> Patch 12: >> This patch introduces support for eDMA v3. In addition, this patch has >> been designed with an eye towards future upgradability, specifically for >> transitioning to eDMA v5. The latter involves a significant upgrade >> where the TCD address would need to support 64 bits. >> >> Patch 13: >> This patch focuses on the device tree bindings and their modifications >> to properly handle and integrate the changes brought about by eDMA v3 > > @vkoul: > Do you have chance to check these patches? Any chance to come into 6.5 > All audio parts of i.MX8x and i.MX9 was dependent on these patches. Why do you ping during the merge window? v6.5? And what about having it in next for two weeks? One thing is to ping for something forgotten, different thing is to try squeeze patches skipping our process. Best regards, Krzysztof
On Sun, Jul 02, 2023 at 10:22:22PM +0200, Krzysztof Kozlowski wrote: > On 28/06/2023 16:45, Frank Li wrote: > > On Tue, Jun 20, 2023 at 04:12:08PM -0400, Frank Li wrote: > >> This patch series introduces support for the eDMA version 3 from > >> Freescale. The eDMA v3 brings alterations in the register layout, > >> particularly, the separation of channel control registers into > >> different channels. The Transfer Control Descriptor (TCD) layout, > >> however, remains identical with only the offset being changed. > >> > >> The first 11 patches aim at tidying up the existing Freescale > >> eDMA code and laying the groundwork for the integration of eDMA v3 > >> support. > >> > >> Patch 1-11: > >> These patches primarily focus on cleaning up and refactoring the existing > >> fsl_edma driver code. This is to accommodate the upcoming changes and new > >> features introduced with the eDMA v3. > >> > >> Patch 12: > >> This patch introduces support for eDMA v3. In addition, this patch has > >> been designed with an eye towards future upgradability, specifically for > >> transitioning to eDMA v5. The latter involves a significant upgrade > >> where the TCD address would need to support 64 bits. > >> > >> Patch 13: > >> This patch focuses on the device tree bindings and their modifications > >> to properly handle and integrate the changes brought about by eDMA v3 > > > > @vkoul: > > Do you have chance to check these patches? Any chance to come into 6.5 > > All audio parts of i.MX8x and i.MX9 was dependent on these patches. > > Why do you ping during the merge window? > > v6.5? And what about having it in next for two weeks? One thing is to > ping for something forgotten, different thing is to try squeeze patches > skipping our process. I saw dmaengine tree have not update over 5 weeks. https://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine.git/ And vkoul have not sent out pull request yet. So I just want to check if possible. Frank > > Best regards, > Krzysztof >
On 03/07/2023 16:45, Frank Li wrote: > On Sun, Jul 02, 2023 at 10:22:22PM +0200, Krzysztof Kozlowski wrote: >> On 28/06/2023 16:45, Frank Li wrote: >>> On Tue, Jun 20, 2023 at 04:12:08PM -0400, Frank Li wrote: >>>> This patch series introduces support for the eDMA version 3 from >>>> Freescale. The eDMA v3 brings alterations in the register layout, >>>> particularly, the separation of channel control registers into >>>> different channels. The Transfer Control Descriptor (TCD) layout, >>>> however, remains identical with only the offset being changed. >>>> >>>> The first 11 patches aim at tidying up the existing Freescale >>>> eDMA code and laying the groundwork for the integration of eDMA v3 >>>> support. >>>> >>>> Patch 1-11: >>>> These patches primarily focus on cleaning up and refactoring the existing >>>> fsl_edma driver code. This is to accommodate the upcoming changes and new >>>> features introduced with the eDMA v3. >>>> >>>> Patch 12: >>>> This patch introduces support for eDMA v3. In addition, this patch has >>>> been designed with an eye towards future upgradability, specifically for >>>> transitioning to eDMA v5. The latter involves a significant upgrade >>>> where the TCD address would need to support 64 bits. >>>> >>>> Patch 13: >>>> This patch focuses on the device tree bindings and their modifications >>>> to properly handle and integrate the changes brought about by eDMA v3 >>> >>> @vkoul: >>> Do you have chance to check these patches? Any chance to come into 6.5 >>> All audio parts of i.MX8x and i.MX9 was dependent on these patches. >> >> Why do you ping during the merge window? >> >> v6.5? And what about having it in next for two weeks? One thing is to >> ping for something forgotten, different thing is to try squeeze patches >> skipping our process. > > I saw dmaengine tree have not update over 5 weeks. > https://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine.git/ Then you should have pinged during that time. > And vkoul have not sent out pull request yet. So I just want to check > if possible. It is merge window. Patches are supposed to be in next for two weeks before merge window. Best regards, Krzysztof