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[v3,00/28] ARM: qcom: apq8064: support CPU frequency scaling

Message ID 20230702174246.121656-1-dmitry.baryshkov@linaro.org (mailing list archive)
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Series ARM: qcom: apq8064: support CPU frequency scaling | expand

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Dmitry Baryshkov July 2, 2023, 5:42 p.m. UTC
Implement CPUFreq support for one of the oldest supported Qualcomm
platforms, APQ8064. Each core has independent power and frequency
control. Additionally the L2 cache is scaled to follow the CPU
frequencies (failure to do so results in strange semi-random crashes).

Core voltage is controlled through the SAW2 devices, one for each core.
The L2 has two regulators, vdd-mem and vdd-dig.

Dependencies: [1].

[1] https://lore.kernel.org/linux-arm-msm/20230702134320.98831-1-dmitry.baryshkov@linaro.org/

Changes since v2:
- Merged basic cpufreq and voltage patches, to make sure that we don't
  undervolt the cores (Konrad)
- Reordered patches pushing voltage constraints early (Konrad)
- Removed KRAIT_NUM_CLOCKS from the kraitcc bindings header (Konrad)
- Rebased on top of PMIC cleanup
- Added missing regulator constraints to apq8064-cm-qs600 and
  apq8064-sony-xperia-lagan-yuga.

Changes since v1:
- Added separate Krait L2 cache device driver
- Moved vdd-mem and vdd-dig scaling to the L2 cache device (Christian,
  Stephen Gerhold)
- Fixed the 'INTERCONNECT' in the guarding define for krait-cc bindings
  (Stephen Boyd)
- Made SAW2's regulator property -> node handling clear (Krzysztof)
- Dropped the 'regulator' property from all SAW2 devices.

Dmitry Baryshkov (28):
  dt-bindings: opp: opp-v2-kryo-cpu: support Qualcomm Krait SoCs
  dt-bindings: soc: qcom: merge qcom,saw2.txt into qcom,spm.yaml
  dt-bindings: soc: qcom: qcom,saw2: define optional regulator node
  dt-bindings: clock: qcom,krait-cc: Krait core clock controller
  dt-bindings: cache: describe L2 cache on Qualcomm Krait platforms
  interconnect: icc-clk: add support for scaling using OPP
  clk: qcom: krait-cc: rewrite driver to use clk_hw instead of clk
  soc: qcom: spm: add support for voltage regulator
  cpufreq: qcom-nvmem: create L2 cache device
  cpufreq: qcom-nvmem: also accept operating-points-v2-krait-cpu
  cpufreq: qcom-nvmem: drop pvs_ver for format a fuses
  cpufreq: qcom-nvmem: provide separate configuration data for apq8064
  soc: qcom: Add driver for Qualcomm Krait L2 cache scaling
  ARM: dts: qcom: apq8064-asus-nexus7-flo: constraint cpufreq regulators
  ARM: dts: qcom: apq8064-cm-qs600: constraint cpufreq regulators
  ARM: dts: qcom: apq8064-ifc6410: constraint cpufreq regulators
  ARM: dts: qcom: apq8064-sony-xperia-lagan-yuga: constraint cpufreq
    regulators
  ARM: dts: qcom: apq8064: rename SAW nodes to power-manager
  ARM: dts: qcom: apq8064: declare SAW2 regulators
  ARM: dts: qcom: apq8064: add Krait clock controller
  ARM: dts: qcom: apq8064: add L2 cache scaling
  ARM: dts: qcom: apq8064: add simple CPUFreq support
  ARM: dts: qcom: apq8064: enable passive CPU cooling
  ARM: dts: qcom: msm8960: declare SAW2 regulators
  ARM: dts: qcom: apq8084: drop 'regulator' property from SAW2 device
  ARM: dts: qcom: msm8974: drop 'regulator' property from SAW2 device
  ARM: dts: qcom: ipq4019: drop 'regulator' property from SAW2 devices
  ARM: dts: qcom: ipq8064: drop 'regulator' property from SAW2 devices

 .../devicetree/bindings/arm/msm/qcom,saw2.txt |  58 --
 .../bindings/cache/qcom,krait-l2-cache.yaml   |  75 ++
 .../bindings/opp/opp-v2-kryo-cpu.yaml         |  12 +-
 .../qcom/{qcom,spm.yaml => qcom,saw2.yaml}    |  39 +-
 .../dts/qcom/qcom-apq8064-asus-nexus7-flo.dts |  19 +-
 .../boot/dts/qcom/qcom-apq8064-cm-qs600.dts   |  23 +-
 .../boot/dts/qcom/qcom-apq8064-ifc6410.dts    |  23 +-
 .../qcom-apq8064-sony-xperia-lagan-yuga.dts   |  13 +-
 arch/arm/boot/dts/qcom/qcom-apq8064.dtsi      | 669 +++++++++++++++++-
 arch/arm/boot/dts/qcom/qcom-apq8084.dtsi      |   1 -
 arch/arm/boot/dts/qcom/qcom-ipq4019.dtsi      |   5 -
 arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi      |   2 -
 arch/arm/boot/dts/qcom/qcom-msm8960.dtsi      |  12 +-
 arch/arm/boot/dts/qcom/qcom-msm8974.dtsi      |   1 -
 drivers/clk/qcom/krait-cc.c                   | 141 ++--
 drivers/cpufreq/qcom-cpufreq-nvmem.c          |  77 +-
 drivers/interconnect/icc-clk.c                |  13 +-
 drivers/soc/qcom/Kconfig                      |   9 +
 drivers/soc/qcom/Makefile                     |   1 +
 drivers/soc/qcom/krait-l2-cache.c             | 167 +++++
 drivers/soc/qcom/spm.c                        | 205 +++++-
 include/dt-bindings/clock/qcom,krait-cc.h     |  15 +
 include/dt-bindings/soc/qcom,krait-l2-cache.h |  12 +
 include/linux/interconnect-clk.h              |   1 +
 include/soc/qcom/spm.h                        |   9 +
 25 files changed, 1418 insertions(+), 184 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/arm/msm/qcom,saw2.txt
 create mode 100644 Documentation/devicetree/bindings/cache/qcom,krait-l2-cache.yaml
 rename Documentation/devicetree/bindings/soc/qcom/{qcom,spm.yaml => qcom,saw2.yaml} (57%)
 create mode 100644 drivers/soc/qcom/krait-l2-cache.c
 create mode 100644 include/dt-bindings/clock/qcom,krait-cc.h
 create mode 100644 include/dt-bindings/soc/qcom,krait-l2-cache.h

Comments

Viresh Kumar July 3, 2023, 4:39 a.m. UTC | #1
On 02-07-23, 20:42, Dmitry Baryshkov wrote:
> Implement CPUFreq support for one of the oldest supported Qualcomm
> platforms, APQ8064. Each core has independent power and frequency
> control. Additionally the L2 cache is scaled to follow the CPU
> frequencies (failure to do so results in strange semi-random crashes).
> 
> Core voltage is controlled through the SAW2 devices, one for each core.
> The L2 has two regulators, vdd-mem and vdd-dig.

Is it possible to send the cpufreq/opp patches separately so I can apply
directly ?
Linus Walleij July 7, 2023, 9:34 a.m. UTC | #2
On Sun, Jul 2, 2023 at 7:43 PM Dmitry Baryshkov
<dmitry.baryshkov@linaro.org> wrote:

> Implement CPUFreq support for one of the oldest supported Qualcomm
> platforms, APQ8064. Each core has independent power and frequency
> control. Additionally the L2 cache is scaled to follow the CPU
> frequencies (failure to do so results in strange semi-random crashes).
>
> Core voltage is controlled through the SAW2 devices, one for each core.
> The L2 has two regulators, vdd-mem and vdd-dig.
>
> Dependencies: [1].
>
> [1] https://lore.kernel.org/linux-arm-msm/20230702134320.98831-1-dmitry.baryshkov@linaro.org/

Just because it looks so cool, I applied this patches and the prerequisite
to master and booted the result on the APQ8060 DragonBoard, and
it still works.
Tested-by: Linus Walleij <linus.walleij@linaro.org>
(Mostly for the DTS refactoring, which is what affects APQ8060)

I guess the APQ8064 cpufreq and APQ8060 isn't actually far
apart, so it should be possible to fix APQ8060 as well, but we
can take that another day. I always wanted to fix the SAW2
regulators.

Yours,
Linus Walleij
Dmitry Baryshkov July 7, 2023, 10:59 a.m. UTC | #3
On Fri, 7 Jul 2023 at 12:34, Linus Walleij <linus.walleij@linaro.org> wrote:
>
> On Sun, Jul 2, 2023 at 7:43 PM Dmitry Baryshkov
> <dmitry.baryshkov@linaro.org> wrote:
>
> > Implement CPUFreq support for one of the oldest supported Qualcomm
> > platforms, APQ8064. Each core has independent power and frequency
> > control. Additionally the L2 cache is scaled to follow the CPU
> > frequencies (failure to do so results in strange semi-random crashes).
> >
> > Core voltage is controlled through the SAW2 devices, one for each core.
> > The L2 has two regulators, vdd-mem and vdd-dig.
> >
> > Dependencies: [1].
> >
> > [1] https://lore.kernel.org/linux-arm-msm/20230702134320.98831-1-dmitry.baryshkov@linaro.org/
>
> Just because it looks so cool, I applied this patches and the prerequisite
> to master and booted the result on the APQ8060 DragonBoard, and
> it still works.
> Tested-by: Linus Walleij <linus.walleij@linaro.org>
> (Mostly for the DTS refactoring, which is what affects APQ8060)
>
> I guess the APQ8064 cpufreq and APQ8060 isn't actually far
> apart, so it should be possible to fix APQ8060 as well, but we
> can take that another day. I always wanted to fix the SAW2
> regulators.

APQ8060 (as well as MSM8260 / MSM8660) were a previous generation of
the cores, Scorpion vs Krait. So far it requires two items to work:
SCPLL, the core pll driver, and the fixed AVS setting (which might
also be required for MSM8960). Let me take a glance in the next couple
of days.