| Message ID | 20230707124644.3965281-1-tvrtko.ursulin@linux.intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm/i915: Remove dead code from gen8_pte_encode | expand |
On Fri, Jul 07, 2023 at 01:46:44PM +0100, Tvrtko Ursulin wrote: > From: Tvrtko Ursulin <tvrtko.ursulin@intel.com> > > Commit 9275277d5324 ("drm/i915: use pat_index instead of cache_level") > added a dedicated gen12_pte_encode but forgot to remove the Gen12 specific > bit from gen8_pte_encode. > > Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> > Fixes: 9275277d5324 ("drm/i915: use pat_index instead of cache_level") > Cc: Fei Yang <fei.yang@intel.com> > Cc: Andi Shyti <andi.shyti@linux.intel.com> > Cc: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> > --- > drivers/gpu/drm/i915/gt/gen8_ppgtt.c | 3 --- > 1 file changed, 3 deletions(-) > > diff --git a/drivers/gpu/drm/i915/gt/gen8_ppgtt.c b/drivers/gpu/drm/i915/gt/gen8_ppgtt.c > index f948d33e5ec5..c8568e5d1147 100644 > --- a/drivers/gpu/drm/i915/gt/gen8_ppgtt.c > +++ b/drivers/gpu/drm/i915/gt/gen8_ppgtt.c > @@ -37,9 +37,6 @@ static u64 gen8_pte_encode(dma_addr_t addr, > if (unlikely(flags & PTE_READ_ONLY)) > pte &= ~GEN8_PAGE_RW; > > - if (flags & PTE_LM) > - pte |= GEN12_PPGTT_PTE_LM; > - > /* > * For pre-gen12 platforms pat_index is the same as enum > * i915_cache_level, so the switch-case here is still valid. > -- > 2.39.2 >
> From: Tvrtko Ursulin <tvrtko.ursulin@intel.com> > > Commit 9275277d5324 ("drm/i915: use pat_index instead of cache_level") > added a dedicated gen12_pte_encode but forgot to remove the Gen12 > specific bit from gen8_pte_encode. Reviewed-by: Fei Yang <fei.yang@intel.com> > Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> > Fixes: 9275277d5324 ("drm/i915: use pat_index instead of cache_level") > Cc: Fei Yang <fei.yang@intel.com> > Cc: Andi Shyti <andi.shyti@linux.intel.com> > Cc: Matt Roper <matthew.d.roper@intel.com> > --- > drivers/gpu/drm/i915/gt/gen8_ppgtt.c | 3 --- > 1 file changed, 3 deletions(-) > > diff --git a/drivers/gpu/drm/i915/gt/gen8_ppgtt.c b/drivers/gpu/drm/i915/gt/gen8_ppgtt.c > index f948d33e5ec5..c8568e5d1147 100644 > --- a/drivers/gpu/drm/i915/gt/gen8_ppgtt.c > +++ b/drivers/gpu/drm/i915/gt/gen8_ppgtt.c > @@ -37,9 +37,6 @@ static u64 gen8_pte_encode(dma_addr_t addr, > if (unlikely(flags & PTE_READ_ONLY)) > pte &= ~GEN8_PAGE_RW; > > - if (flags & PTE_LM) > - pte |= GEN12_PPGTT_PTE_LM; > - > /* > * For pre-gen12 platforms pat_index is the same as enum > * i915_cache_level, so the switch-case here is still valid. > -- > 2.39.2
On 07/07/2023 15:17, Rodrigo Vivi wrote: > On Fri, Jul 07, 2023 at 01:46:44PM +0100, Tvrtko Ursulin wrote: >> From: Tvrtko Ursulin <tvrtko.ursulin@intel.com> >> >> Commit 9275277d5324 ("drm/i915: use pat_index instead of cache_level") >> added a dedicated gen12_pte_encode but forgot to remove the Gen12 specific >> bit from gen8_pte_encode. >> >> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> >> Fixes: 9275277d5324 ("drm/i915: use pat_index instead of cache_level") >> Cc: Fei Yang <fei.yang@intel.com> >> Cc: Andi Shyti <andi.shyti@linux.intel.com> >> Cc: Matt Roper <matthew.d.roper@intel.com> > > Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Pushed, thanks for the reviews! Regards, Tvrtko > >> --- >> drivers/gpu/drm/i915/gt/gen8_ppgtt.c | 3 --- >> 1 file changed, 3 deletions(-) >> >> diff --git a/drivers/gpu/drm/i915/gt/gen8_ppgtt.c b/drivers/gpu/drm/i915/gt/gen8_ppgtt.c >> index f948d33e5ec5..c8568e5d1147 100644 >> --- a/drivers/gpu/drm/i915/gt/gen8_ppgtt.c >> +++ b/drivers/gpu/drm/i915/gt/gen8_ppgtt.c >> @@ -37,9 +37,6 @@ static u64 gen8_pte_encode(dma_addr_t addr, >> if (unlikely(flags & PTE_READ_ONLY)) >> pte &= ~GEN8_PAGE_RW; >> >> - if (flags & PTE_LM) >> - pte |= GEN12_PPGTT_PTE_LM; >> - >> /* >> * For pre-gen12 platforms pat_index is the same as enum >> * i915_cache_level, so the switch-case here is still valid. >> -- >> 2.39.2 >>
Hi Tvrtko, > Commit 9275277d5324 ("drm/i915: use pat_index instead of cache_level") > added a dedicated gen12_pte_encode but forgot to remove the Gen12 specific > bit from gen8_pte_encode. > > Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> > Fixes: 9275277d5324 ("drm/i915: use pat_index instead of cache_level") > Cc: Fei Yang <fei.yang@intel.com> > Cc: Andi Shyti <andi.shyti@linux.intel.com> > Cc: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com> Andi
diff --git a/drivers/gpu/drm/i915/gt/gen8_ppgtt.c b/drivers/gpu/drm/i915/gt/gen8_ppgtt.c index f948d33e5ec5..c8568e5d1147 100644 --- a/drivers/gpu/drm/i915/gt/gen8_ppgtt.c +++ b/drivers/gpu/drm/i915/gt/gen8_ppgtt.c @@ -37,9 +37,6 @@ static u64 gen8_pte_encode(dma_addr_t addr, if (unlikely(flags & PTE_READ_ONLY)) pte &= ~GEN8_PAGE_RW; - if (flags & PTE_LM) - pte |= GEN12_PPGTT_PTE_LM; - /* * For pre-gen12 platforms pat_index is the same as enum * i915_cache_level, so the switch-case here is still valid.