| Message ID | 20230630162043.79198-1-robdclark@gmail.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm/msm/a6xx: Fix misleading comment | expand |
On 30/06/2023 19:20, Rob Clark wrote: > From: Rob Clark <robdclark@chromium.org> > > The range is actually len+1. > > Signed-off-by: Rob Clark <robdclark@chromium.org> > --- > drivers/gpu/drm/msm/adreno/a6xx_gpu.h | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
On Fri, Jun 30, 2023 at 09:20:43AM -0700, Rob Clark wrote: > > From: Rob Clark <robdclark@chromium.org> > > The range is actually len+1. > > Signed-off-by: Rob Clark <robdclark@chromium.org> Reviewed-by: Akhil P Oommen <quic_akhilpo@quicinc.com> -Akhil > --- > drivers/gpu/drm/msm/adreno/a6xx_gpu.h | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.h b/drivers/gpu/drm/msm/adreno/a6xx_gpu.h > index eea2e60ce3b7..edf76a4b16bd 100644 > --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.h > +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.h > @@ -39,8 +39,8 @@ struct a6xx_gpu { > > /* > * Given a register and a count, return a value to program into > - * REG_CP_PROTECT_REG(n) - this will block both reads and writes for _len > - * registers starting at _reg. > + * REG_CP_PROTECT_REG(n) - this will block both reads and writes for > + * _len + 1 registers starting at _reg. > */ > #define A6XX_PROTECT_NORDWR(_reg, _len) \ > ((1 << 31) | \ > -- > 2.41.0 >
diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.h b/drivers/gpu/drm/msm/adreno/a6xx_gpu.h index eea2e60ce3b7..edf76a4b16bd 100644 --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.h +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.h @@ -39,8 +39,8 @@ struct a6xx_gpu { /* * Given a register and a count, return a value to program into - * REG_CP_PROTECT_REG(n) - this will block both reads and writes for _len - * registers starting at _reg. + * REG_CP_PROTECT_REG(n) - this will block both reads and writes for + * _len + 1 registers starting at _reg. */ #define A6XX_PROTECT_NORDWR(_reg, _len) \ ((1 << 31) | \