diff mbox series

cxl: Fix double shift of CXL_FW_CANCEL

Message ID 20230712164224.31891-1-dave@stgolabs.net
State Superseded
Headers show
Series cxl: Fix double shift of CXL_FW_CANCEL | expand

Commit Message

Davidlohr Bueso July 12, 2023, 4:42 p.m. UTC
Directly use the bit number for bitops, which already has a shift
built in. This bug is benign as its done consistently and it doesn't
clash with any other flags.

Fixes: 9521875bbe00 ("cxl: add a firmware update mechanism using the sysfs firmware loader")
Signed-off-by: Davidlohr Bueso <dave@stgolabs.net>
---
 drivers/cxl/cxlmem.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Verma, Vishal L July 12, 2023, 5:39 p.m. UTC | #1
On Wed, 2023-07-12 at 09:42 -0700, Davidlohr Bueso wrote:
> Directly use the bit number for bitops, which already has a shift
> built in. This bug is benign as its done consistently and it doesn't
> clash with any other flags.

Ah good catch!

> 
> Fixes: 9521875bbe00 ("cxl: add a firmware update mechanism using the sysfs firmware loader")
> Signed-off-by: Davidlohr Bueso <dave@stgolabs.net>

Reviewed-by: Vishal Verma <vishal.l.verma@intel.com>

> ---
>  drivers/cxl/cxlmem.h | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/cxl/cxlmem.h b/drivers/cxl/cxlmem.h
> index 79e99c873ca2..499113328586 100644
> --- a/drivers/cxl/cxlmem.h
> +++ b/drivers/cxl/cxlmem.h
> @@ -323,7 +323,7 @@ struct cxl_mbox_activate_fw {
>  
>  /* FW state bits */
>  #define CXL_FW_STATE_BITS              32
> -#define CXL_FW_CANCEL          BIT(0)
> +#define CXL_FW_CANCEL                  0
>  
>  /**
>   * struct cxl_fw_state - Firmware upload / activation state
Dave Jiang July 12, 2023, 5:59 p.m. UTC | #2
On 7/12/23 09:42, Davidlohr Bueso wrote:
> Directly use the bit number for bitops, which already has a shift
> built in. This bug is benign as its done consistently and it doesn't
> clash with any other flags.
> 
> Fixes: 9521875bbe00 ("cxl: add a firmware update mechanism using the sysfs firmware loader")
> Signed-off-by: Davidlohr Bueso <dave@stgolabs.net>

Reviewed-by: Dave Jiang <dave.jiang@intel.com>
> ---
>   drivers/cxl/cxlmem.h | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/cxl/cxlmem.h b/drivers/cxl/cxlmem.h
> index 79e99c873ca2..499113328586 100644
> --- a/drivers/cxl/cxlmem.h
> +++ b/drivers/cxl/cxlmem.h
> @@ -323,7 +323,7 @@ struct cxl_mbox_activate_fw {
>   
>   /* FW state bits */
>   #define CXL_FW_STATE_BITS		32
> -#define CXL_FW_CANCEL		BIT(0)
> +#define CXL_FW_CANCEL			0
>   
>   /**
>    * struct cxl_fw_state - Firmware upload / activation state
Davidlohr Bueso July 12, 2023, 6:02 p.m. UTC | #3
On Wed, 12 Jul 2023, Verma, Vishal L wrote:

>On Wed, 2023-07-12 at 09:42 -0700, Davidlohr Bueso wrote:
>> Directly use the bit number for bitops, which already has a shift
>> built in. This bug is benign as its done consistently and it doesn't
>> clash with any other flags.
>
>Ah good catch!

Actually this is a duplicate. I just noticed, scrolling the list, that Dan
Carpenter has already sent a fix for this. His patch should be picked up.
Sorry for the noise.

Thanks,
Davidlohr
diff mbox series

Patch

diff --git a/drivers/cxl/cxlmem.h b/drivers/cxl/cxlmem.h
index 79e99c873ca2..499113328586 100644
--- a/drivers/cxl/cxlmem.h
+++ b/drivers/cxl/cxlmem.h
@@ -323,7 +323,7 @@  struct cxl_mbox_activate_fw {
 
 /* FW state bits */
 #define CXL_FW_STATE_BITS		32
-#define CXL_FW_CANCEL		BIT(0)
+#define CXL_FW_CANCEL			0
 
 /**
  * struct cxl_fw_state - Firmware upload / activation state