Message ID | 6c2e9caddfb9427444307d8443f1b231e500787b.1689012506.git.daniel@makrotopia.org (mailing list archive) |
---|---|
State | Superseded |
Delegated to: | Netdev Maintainers |
Headers | show |
Series | net: ethernet: mtk_eth_soc: add basic support for MT7988 SoC | expand |
Context | Check | Description |
---|---|---|
netdev/series_format | success | Posting correctly formatted |
netdev/tree_selection | success | Clearly marked for net-next |
netdev/fixes_present | success | Fixes tag not required for -next series |
netdev/header_inline | success | No static functions without inline keyword in header files |
netdev/build_32bit | success | Errors and warnings before: 8 this patch: 8 |
netdev/cc_maintainers | success | CCed 15 of 15 maintainers |
netdev/build_clang | success | Errors and warnings before: 8 this patch: 8 |
netdev/verify_signedoff | success | Signed-off-by tag matches author and committer |
netdev/deprecated_api | success | None detected |
netdev/check_selftest | success | No net selftest shell script |
netdev/verify_fixes | success | No Fixes tag |
netdev/build_allmodconfig_warn | success | Errors and warnings before: 8 this patch: 8 |
netdev/checkpatch | success | total: 0 errors, 0 warnings, 0 checks, 135 lines checked |
netdev/kdoc | success | Errors and warnings before: 0 this patch: 0 |
netdev/source_inline | success | Was 0 now: 0 |
On Thu, 13 Jul 2023 03:17:55 +0100, Daniel Golle wrote: > Introduce DT bindings for the MT7988 SoC to mediatek,net.yaml. > The MT7988 SoC got 3 Ethernet MACs operating at a maximum of > 10 Gigabit/sec supported by 2 packet processor engines for > offloading tasks. > The first MAC is hard-wired to a built-in switch which exposes > four 1000Base-T PHYs as user ports. > It also comes with built-in 2500Base-T PHY which can be used > with the 2nd GMAC. > The 2nd and 3rd GMAC can be connected to external PHYs or provide > SFP(+) cages attached via SGMII, 1000Base-X, 2500Base-X, USXGMII, > 5GBase-R or 10GBase-KR. > > Signed-off-by: Daniel Golle <daniel@makrotopia.org> > --- > .../devicetree/bindings/net/mediatek,net.yaml | 111 ++++++++++++++++++ > 1 file changed, 111 insertions(+) > My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check' on your patch (DT_CHECKER_FLAGS is new in v5.13): yamllint warnings/errors: ./Documentation/devicetree/bindings/net/mediatek,net.yaml:76:9: [error] syntax error: could not find expected ':' (syntax) dtschema/dtc warnings/errors: make[2]: *** Deleting file 'Documentation/devicetree/bindings/net/mediatek,net.example.dts' Documentation/devicetree/bindings/net/mediatek,net.yaml:76:9: could not find expected ':' make[2]: *** [Documentation/devicetree/bindings/Makefile:26: Documentation/devicetree/bindings/net/mediatek,net.example.dts] Error 1 make[2]: *** Waiting for unfinished jobs.... ./Documentation/devicetree/bindings/net/mediatek,net.yaml:76:9: could not find expected ':' /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/net/mediatek,net.yaml: ignoring, error parsing file make[1]: *** [/builds/robherring/dt-review-ci/linux/Makefile:1500: dt_binding_check] Error 2 make: *** [Makefile:234: __sub-make] Error 2 doc reference errors (make refcheckdocs): See https://patchwork.ozlabs.org/project/devicetree-bindings/patch/6c2e9caddfb9427444307d8443f1b231e500787b.1689012506.git.daniel@makrotopia.org The base for the series is generally the latest rc1. A different dependency should be noted in *this* patch. If you already ran 'make dt_binding_check' and didn't see the above error(s), then make sure 'yamllint' is installed and dt-schema is up to date: pip3 install dtschema --upgrade Please check and re-submit after running the above command yourself. Note that DT_SCHEMA_FILES can be set to your schema file to speed up checking your schema. However, it must be unset to test all examples with your schema.
On 13/07/2023 04:17, Daniel Golle wrote: > Introduce DT bindings for the MT7988 SoC to mediatek,net.yaml. > The MT7988 SoC got 3 Ethernet MACs operating at a maximum of > 10 Gigabit/sec supported by 2 packet processor engines for > offloading tasks. > The first MAC is hard-wired to a built-in switch which exposes > four 1000Base-T PHYs as user ports. > It also comes with built-in 2500Base-T PHY which can be used > with the 2nd GMAC. > The 2nd and 3rd GMAC can be connected to external PHYs or provide > SFP(+) cages attached via SGMII, 1000Base-X, 2500Base-X, USXGMII, > 5GBase-R or 10GBase-KR. > > Signed-off-by: Daniel Golle <daniel@makrotopia.org> It does not look like you tested the bindings, at least after quick look. Please run `make dt_binding_check` (see Documentation/devicetree/bindings/writing-schema.rst for instructions). Maybe you need to update your dtschema and yamllint. Beside that: 1. no underscores in property names. 2. Don't use syscon as an excuse for laziness. PLL is a clock, not syscon. Best regards, Krzysztof
diff --git a/Documentation/devicetree/bindings/net/mediatek,net.yaml b/Documentation/devicetree/bindings/net/mediatek,net.yaml index 38aa3d97ee234..59f074e56fe2a 100644 --- a/Documentation/devicetree/bindings/net/mediatek,net.yaml +++ b/Documentation/devicetree/bindings/net/mediatek,net.yaml @@ -24,6 +24,7 @@ properties: - mediatek,mt7629-eth - mediatek,mt7981-eth - mediatek,mt7986-eth + - mediatek,mt7988-eth - ralink,rt5350-eth reg: @@ -71,6 +72,22 @@ properties: A list of phandle to the syscon node that handles the SGMII setup which is required for those SoCs equipped with SGMII. + mediatek,toprgu + $ref: /schemas/types.yaml#/definitions/phandle + description: + Phandle to the mediatek toprgu controller used to provide various clocks + and reset to the system. + + mediatek,usxgmiisys: + $ref: /schemas/types.yaml#/definitions/phandle-array + minItems: 2 + maxItems: 2 + items: + maxItems: 1 + description: + A list of phandle to the syscon node that handles the USXGMII setup which is required for + those SoCs equipped with USXGMII. + mediatek,wed: $ref: /schemas/types.yaml#/definitions/phandle-array minItems: 2 @@ -85,6 +102,21 @@ properties: description: Phandle to the mediatek wed-pcie controller. + mediatek,xfi_pextp: + $ref: /schemas/types.yaml#/definitions/phandle-array + minItems: 2 + maxItems: 2 + items: + maxItems: 1 + description: + A list of phandle to the syscon node that handles the XFI setup which is required for + those SoCs equipped with XFI. + + mediatek,xfi_pll: + $ref: /schemas/types.yaml#/definitions/phandle + description: + Phandle to the XFI PLL unit. + dma-coherent: true mdio-bus: @@ -315,6 +347,85 @@ allOf: minItems: 2 maxItems: 2 + - if: + properties: + compatible: + contains: + const: mediatek,mt7988-eth + then: + properties: + interrupts: + minItems: 4 + + clocks: + minItems: 34 + maxItems: 34 + + clock-names: + items: + - const: crypto + - const: fe + - const: gp2 + - const: gp1 + - const: gp3 + - const: ethwarp_wocpu2 + - const: ethwarp_wocpu1 + - const: ethwarp_wocpu0 + - const: esw + - const: netsys0 + - const: netsys1 + - const: sgmii_tx250m + - const: sgmii_rx250m + - const: sgmii2_tx250m + - const: sgmii2_rx250m + - const: top_usxgmii0_sel + - const: top_usxgmii1_sel + - const: top_sgm0_sel + - const: top_sgm1_sel + - const: top_xfi_phy0_xtal_sel + - const: top_xfi_phy1_xtal_sel + - const: top_eth_gmii_sel + - const: top_eth_refck_50m_sel + - const: top_eth_sys_200m_sel + - const: top_eth_sys_sel + - const: top_eth_xgmii_sel + - const: top_eth_mii_sel + - const: top_netsys_sel + - const: top_netsys_500m_sel + - const: top_netsys_pao_2x_sel + - const: top_netsys_sync_250m_sel + - const: top_netsys_ppefb_250m_sel + - const: top_netsys_warp_sel + - const: wocpu1 + - const: wocpu0 + - const: xgp1 + - const: xgp2 + - const: xgp3 + + mediatek,sgmiisys: + minItems: 2 + maxItems: 2 + + mediatek,usxgmiisys: + minItems: 2 + maxItems: 2 + + mediatek,xfi_pextp: + minItems: 2 + maxItems: 2 + + mediatek,xfi_pll: + minItems: 1 + maxItems: 1 + + mediatek,infracfg + minItems: 1 + maxItems: 1 + + mediatek,toprgu + minItems: 1 + maxItems: 1 + patternProperties: "^mac@[0-1]$": type: object
Introduce DT bindings for the MT7988 SoC to mediatek,net.yaml. The MT7988 SoC got 3 Ethernet MACs operating at a maximum of 10 Gigabit/sec supported by 2 packet processor engines for offloading tasks. The first MAC is hard-wired to a built-in switch which exposes four 1000Base-T PHYs as user ports. It also comes with built-in 2500Base-T PHY which can be used with the 2nd GMAC. The 2nd and 3rd GMAC can be connected to external PHYs or provide SFP(+) cages attached via SGMII, 1000Base-X, 2500Base-X, USXGMII, 5GBase-R or 10GBase-KR. Signed-off-by: Daniel Golle <daniel@makrotopia.org> --- .../devicetree/bindings/net/mediatek,net.yaml | 111 ++++++++++++++++++ 1 file changed, 111 insertions(+)