diff mbox series

[v2,06/11] tpm_crb: move ACPI table building to device interface

Message ID 20230714070931.23476-7-j@getutm.app (mailing list archive)
State New, archived
Headers show
Series tpm: introduce TPM CRB SysBus device | expand

Commit Message

Joelle van Dyne July 14, 2023, 7:09 a.m. UTC
This logic is similar to TPM TIS ISA device. Since TPM CRB can only
support TPM 2.0 backends, we check for this in realize.

Signed-off-by: Joelle van Dyne <j@getutm.app>
---
 hw/i386/acpi-build.c | 23 -----------------------
 hw/tpm/tpm_crb.c     | 29 +++++++++++++++++++++++++++++
 2 files changed, 29 insertions(+), 23 deletions(-)

Comments

Stefan Berger July 14, 2023, 5:21 p.m. UTC | #1
On 7/14/23 03:09, Joelle van Dyne wrote:
> This logic is similar to TPM TIS ISA device. Since TPM CRB can only
> support TPM 2.0 backends, we check for this in realize.
> 
> Signed-off-by: Joelle van Dyne <j@getutm.app>

This patch changes the order of in which the ACPI table elements are created but doesn't matter and also doesn't seem to upset ACPI test cases from what I saw:

Reviewed-by: Stefan Berger <stefanb@linux.ibm.com>

> ---
>   hw/i386/acpi-build.c | 23 -----------------------
>   hw/tpm/tpm_crb.c     | 29 +++++++++++++++++++++++++++++
>   2 files changed, 29 insertions(+), 23 deletions(-)
> 
> diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
> index 9c74fa17ad..b767df39df 100644
> --- a/hw/i386/acpi-build.c
> +++ b/hw/i386/acpi-build.c
> @@ -1441,9 +1441,6 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
>       uint32_t nr_mem = machine->ram_slots;
>       int root_bus_limit = 0xFF;
>       PCIBus *bus = NULL;
> -#ifdef CONFIG_TPM
> -    TPMIf *tpm = tpm_find();
> -#endif
>       bool cxl_present = false;
>       int i;
>       VMBusBridge *vmbus_bridge = vmbus_bridge_find();
> @@ -1793,26 +1790,6 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
>           }
>       }
> 
> -#ifdef CONFIG_TPM
> -    if (TPM_IS_CRB(tpm)) {
> -        dev = aml_device("TPM");
> -        aml_append(dev, aml_name_decl("_HID", aml_string("MSFT0101")));
> -        aml_append(dev, aml_name_decl("_STR",
> -                                      aml_string("TPM 2.0 Device")));
> -        crs = aml_resource_template();
> -        aml_append(crs, aml_memory32_fixed(TPM_CRB_ADDR_BASE,
> -                                           TPM_CRB_ADDR_SIZE, AML_READ_WRITE));
> -        aml_append(dev, aml_name_decl("_CRS", crs));
> -
> -        aml_append(dev, aml_name_decl("_STA", aml_int(0xf)));
> -        aml_append(dev, aml_name_decl("_UID", aml_int(1)));
> -
> -        tpm_build_ppi_acpi(tpm, dev);
> -
> -        aml_append(sb_scope, dev);
> -    }
> -#endif
> -
>       if (pcms->sgx_epc.size != 0) {
>           uint64_t epc_base = pcms->sgx_epc.base;
>           uint64_t epc_size = pcms->sgx_epc.size;
> diff --git a/hw/tpm/tpm_crb.c b/hw/tpm/tpm_crb.c
> index 6144081d30..594696ffb8 100644
> --- a/hw/tpm/tpm_crb.c
> +++ b/hw/tpm/tpm_crb.c
> @@ -19,6 +19,8 @@
>   #include "qemu/module.h"
>   #include "qapi/error.h"
>   #include "exec/address-spaces.h"
> +#include "hw/acpi/acpi_aml_interface.h"
> +#include "hw/acpi/tpm.h"
>   #include "hw/qdev-properties.h"
>   #include "hw/pci/pci_ids.h"
>   #include "hw/acpi/tpm.h"
> @@ -99,6 +101,11 @@ static void tpm_crb_isa_realize(DeviceState *dev, Error **errp)
>           return;
>       }
> 
> +    if (tpm_crb_isa_get_version(TPM_IF(s)) != TPM_VERSION_2_0) {
> +        error_setg(errp, "TPM CRB only supports TPM 2.0 backends");
> +        return;
> +    }
> +
>       tpm_crb_init_memory(OBJECT(s), &s->state, errp);
> 
>       memory_region_add_subregion(isa_address_space(ISA_DEVICE(dev)),
> @@ -116,10 +123,30 @@ static void tpm_crb_isa_realize(DeviceState *dev, Error **errp)
>       }
>   }
> 
> +static void build_tpm_crb_isa_aml(AcpiDevAmlIf *adev, Aml *scope)
> +{
> +    Aml *dev, *crs;
> +    CRBState *s = CRB(adev);
> +    TPMIf *ti = TPM_IF(s);
> +
> +    dev = aml_device("TPM");
> +    aml_append(dev, aml_name_decl("_HID", aml_string("MSFT0101")));
> +    aml_append(dev, aml_name_decl("_STR", aml_string("TPM 2.0 Device")));
> +    aml_append(dev, aml_name_decl("_UID", aml_int(1)));
> +    aml_append(dev, aml_name_decl("_STA", aml_int(0xF)));
> +    crs = aml_resource_template();
> +    aml_append(crs, aml_memory32_fixed(TPM_CRB_ADDR_BASE, TPM_CRB_ADDR_SIZE,
> +                                      AML_READ_WRITE));
> +    aml_append(dev, aml_name_decl("_CRS", crs));
> +    tpm_build_ppi_acpi(ti, dev);
> +    aml_append(scope, dev);
> +}
> +
>   static void tpm_crb_isa_class_init(ObjectClass *klass, void *data)
>   {
>       DeviceClass *dc = DEVICE_CLASS(klass);
>       TPMIfClass *tc = TPM_IF_CLASS(klass);
> +    AcpiDevAmlIfClass *adevc = ACPI_DEV_AML_IF_CLASS(klass);
> 
>       dc->realize = tpm_crb_isa_realize;
>       device_class_set_props(dc, tpm_crb_isa_properties);
> @@ -128,6 +155,7 @@ static void tpm_crb_isa_class_init(ObjectClass *klass, void *data)
>       tc->model = TPM_MODEL_TPM_CRB;
>       tc->get_version = tpm_crb_isa_get_version;
>       tc->request_completed = tpm_crb_isa_request_completed;
> +    adevc->build_dev_aml = build_tpm_crb_isa_aml;
> 
>       set_bit(DEVICE_CATEGORY_MISC, dc->categories);
>   }
> @@ -139,6 +167,7 @@ static const TypeInfo tpm_crb_isa_info = {
>       .class_init  = tpm_crb_isa_class_init,
>       .interfaces = (InterfaceInfo[]) {
>           { TYPE_TPM_IF },
> +        { TYPE_ACPI_DEV_AML_IF },
>           { }
>       }
>   };
Igor Mammedov July 17, 2023, 1:42 p.m. UTC | #2
On Fri, 14 Jul 2023 13:21:33 -0400
Stefan Berger <stefanb@linux.ibm.com> wrote:

> On 7/14/23 03:09, Joelle van Dyne wrote:
> > This logic is similar to TPM TIS ISA device. Since TPM CRB can only
> > support TPM 2.0 backends, we check for this in realize.
> > 
> > Signed-off-by: Joelle van Dyne <j@getutm.app>  
> 
> This patch changes the order of in which the ACPI table elements are created but doesn't matter and also doesn't seem to upset ACPI test cases from what I saw:

it seems we do have tests for TIS only (which I added when I was refactoring it to TYPE_ACPI_DEV_AML_IF)
perhaps add a test for CRB before this patch a follow process described in bios-tables-test.c
for updating expected blob

>
> Reviewed-by: Stefan Berger <stefanb@linux.ibm.com>
> 
> > ---
> >   hw/i386/acpi-build.c | 23 -----------------------
> >   hw/tpm/tpm_crb.c     | 29 +++++++++++++++++++++++++++++
> >   2 files changed, 29 insertions(+), 23 deletions(-)
> > 
> > diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
> > index 9c74fa17ad..b767df39df 100644
> > --- a/hw/i386/acpi-build.c
> > +++ b/hw/i386/acpi-build.c
> > @@ -1441,9 +1441,6 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
> >       uint32_t nr_mem = machine->ram_slots;
> >       int root_bus_limit = 0xFF;
> >       PCIBus *bus = NULL;
> > -#ifdef CONFIG_TPM
> > -    TPMIf *tpm = tpm_find();
> > -#endif
> >       bool cxl_present = false;
> >       int i;
> >       VMBusBridge *vmbus_bridge = vmbus_bridge_find();
> > @@ -1793,26 +1790,6 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
> >           }
> >       }
> > 
> > -#ifdef CONFIG_TPM
> > -    if (TPM_IS_CRB(tpm)) {
> > -        dev = aml_device("TPM");
> > -        aml_append(dev, aml_name_decl("_HID", aml_string("MSFT0101")));
> > -        aml_append(dev, aml_name_decl("_STR",
> > -                                      aml_string("TPM 2.0 Device")));
> > -        crs = aml_resource_template();
> > -        aml_append(crs, aml_memory32_fixed(TPM_CRB_ADDR_BASE,
> > -                                           TPM_CRB_ADDR_SIZE, AML_READ_WRITE));
> > -        aml_append(dev, aml_name_decl("_CRS", crs));
> > -
> > -        aml_append(dev, aml_name_decl("_STA", aml_int(0xf)));
> > -        aml_append(dev, aml_name_decl("_UID", aml_int(1)));
> > -
> > -        tpm_build_ppi_acpi(tpm, dev);
> > -
> > -        aml_append(sb_scope, dev);
> > -    }
> > -#endif
> > -
> >       if (pcms->sgx_epc.size != 0) {
> >           uint64_t epc_base = pcms->sgx_epc.base;
> >           uint64_t epc_size = pcms->sgx_epc.size;
> > diff --git a/hw/tpm/tpm_crb.c b/hw/tpm/tpm_crb.c
> > index 6144081d30..594696ffb8 100644
> > --- a/hw/tpm/tpm_crb.c
> > +++ b/hw/tpm/tpm_crb.c
> > @@ -19,6 +19,8 @@
> >   #include "qemu/module.h"
> >   #include "qapi/error.h"
> >   #include "exec/address-spaces.h"
> > +#include "hw/acpi/acpi_aml_interface.h"
> > +#include "hw/acpi/tpm.h"
> >   #include "hw/qdev-properties.h"
> >   #include "hw/pci/pci_ids.h"
> >   #include "hw/acpi/tpm.h"
> > @@ -99,6 +101,11 @@ static void tpm_crb_isa_realize(DeviceState *dev, Error **errp)
> >           return;
> >       }
> > 
> > +    if (tpm_crb_isa_get_version(TPM_IF(s)) != TPM_VERSION_2_0) {
> > +        error_setg(errp, "TPM CRB only supports TPM 2.0 backends");
> > +        return;
> > +    }
> > +
> >       tpm_crb_init_memory(OBJECT(s), &s->state, errp);
> > 
> >       memory_region_add_subregion(isa_address_space(ISA_DEVICE(dev)),
> > @@ -116,10 +123,30 @@ static void tpm_crb_isa_realize(DeviceState *dev, Error **errp)
> >       }
> >   }
> > 
> > +static void build_tpm_crb_isa_aml(AcpiDevAmlIf *adev, Aml *scope)
> > +{
> > +    Aml *dev, *crs;
> > +    CRBState *s = CRB(adev);
> > +    TPMIf *ti = TPM_IF(s);
> > +
> > +    dev = aml_device("TPM");
> > +    aml_append(dev, aml_name_decl("_HID", aml_string("MSFT0101")));
> > +    aml_append(dev, aml_name_decl("_STR", aml_string("TPM 2.0 Device")));
> > +    aml_append(dev, aml_name_decl("_UID", aml_int(1)));
> > +    aml_append(dev, aml_name_decl("_STA", aml_int(0xF)));
> > +    crs = aml_resource_template();
> > +    aml_append(crs, aml_memory32_fixed(TPM_CRB_ADDR_BASE, TPM_CRB_ADDR_SIZE,
> > +                                      AML_READ_WRITE));
> > +    aml_append(dev, aml_name_decl("_CRS", crs));
> > +    tpm_build_ppi_acpi(ti, dev);
> > +    aml_append(scope, dev);
> > +}
> > +
> >   static void tpm_crb_isa_class_init(ObjectClass *klass, void *data)
> >   {
> >       DeviceClass *dc = DEVICE_CLASS(klass);
> >       TPMIfClass *tc = TPM_IF_CLASS(klass);
> > +    AcpiDevAmlIfClass *adevc = ACPI_DEV_AML_IF_CLASS(klass);
> > 
> >       dc->realize = tpm_crb_isa_realize;
> >       device_class_set_props(dc, tpm_crb_isa_properties);
> > @@ -128,6 +155,7 @@ static void tpm_crb_isa_class_init(ObjectClass *klass, void *data)
> >       tc->model = TPM_MODEL_TPM_CRB;
> >       tc->get_version = tpm_crb_isa_get_version;
> >       tc->request_completed = tpm_crb_isa_request_completed;
> > +    adevc->build_dev_aml = build_tpm_crb_isa_aml;
> > 
> >       set_bit(DEVICE_CATEGORY_MISC, dc->categories);
> >   }
> > @@ -139,6 +167,7 @@ static const TypeInfo tpm_crb_isa_info = {
> >       .class_init  = tpm_crb_isa_class_init,
> >       .interfaces = (InterfaceInfo[]) {
> >           { TYPE_TPM_IF },
> > +        { TYPE_ACPI_DEV_AML_IF },
> >           { }
> >       }
> >   };  
>
Joelle van Dyne Aug. 1, 2023, 3:02 a.m. UTC | #3
On Mon, Jul 17, 2023 at 6:42 AM Igor Mammedov <imammedo@redhat.com> wrote:
>
> On Fri, 14 Jul 2023 13:21:33 -0400
> Stefan Berger <stefanb@linux.ibm.com> wrote:
>
> > On 7/14/23 03:09, Joelle van Dyne wrote:
> > > This logic is similar to TPM TIS ISA device. Since TPM CRB can only
> > > support TPM 2.0 backends, we check for this in realize.
> > >
> > > Signed-off-by: Joelle van Dyne <j@getutm.app>
> >
> > This patch changes the order of in which the ACPI table elements are created but doesn't matter and also doesn't seem to upset ACPI test cases from what I saw:
>
> it seems we do have tests for TIS only (which I added when I was refactoring it to TYPE_ACPI_DEV_AML_IF)
> perhaps add a test for CRB before this patch a follow process described in bios-tables-test.c
> for updating expected blob
I read the file and looked at the commits for TIS tests but I'm not
sure I understand how it works. At what point do I specify that the
CRB device should be created for the test?

>
> >
> > Reviewed-by: Stefan Berger <stefanb@linux.ibm.com>
> >
> > > ---
> > >   hw/i386/acpi-build.c | 23 -----------------------
> > >   hw/tpm/tpm_crb.c     | 29 +++++++++++++++++++++++++++++
> > >   2 files changed, 29 insertions(+), 23 deletions(-)
> > >
> > > diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
> > > index 9c74fa17ad..b767df39df 100644
> > > --- a/hw/i386/acpi-build.c
> > > +++ b/hw/i386/acpi-build.c
> > > @@ -1441,9 +1441,6 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
> > >       uint32_t nr_mem = machine->ram_slots;
> > >       int root_bus_limit = 0xFF;
> > >       PCIBus *bus = NULL;
> > > -#ifdef CONFIG_TPM
> > > -    TPMIf *tpm = tpm_find();
> > > -#endif
> > >       bool cxl_present = false;
> > >       int i;
> > >       VMBusBridge *vmbus_bridge = vmbus_bridge_find();
> > > @@ -1793,26 +1790,6 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
> > >           }
> > >       }
> > >
> > > -#ifdef CONFIG_TPM
> > > -    if (TPM_IS_CRB(tpm)) {
> > > -        dev = aml_device("TPM");
> > > -        aml_append(dev, aml_name_decl("_HID", aml_string("MSFT0101")));
> > > -        aml_append(dev, aml_name_decl("_STR",
> > > -                                      aml_string("TPM 2.0 Device")));
> > > -        crs = aml_resource_template();
> > > -        aml_append(crs, aml_memory32_fixed(TPM_CRB_ADDR_BASE,
> > > -                                           TPM_CRB_ADDR_SIZE, AML_READ_WRITE));
> > > -        aml_append(dev, aml_name_decl("_CRS", crs));
> > > -
> > > -        aml_append(dev, aml_name_decl("_STA", aml_int(0xf)));
> > > -        aml_append(dev, aml_name_decl("_UID", aml_int(1)));
> > > -
> > > -        tpm_build_ppi_acpi(tpm, dev);
> > > -
> > > -        aml_append(sb_scope, dev);
> > > -    }
> > > -#endif
> > > -
> > >       if (pcms->sgx_epc.size != 0) {
> > >           uint64_t epc_base = pcms->sgx_epc.base;
> > >           uint64_t epc_size = pcms->sgx_epc.size;
> > > diff --git a/hw/tpm/tpm_crb.c b/hw/tpm/tpm_crb.c
> > > index 6144081d30..594696ffb8 100644
> > > --- a/hw/tpm/tpm_crb.c
> > > +++ b/hw/tpm/tpm_crb.c
> > > @@ -19,6 +19,8 @@
> > >   #include "qemu/module.h"
> > >   #include "qapi/error.h"
> > >   #include "exec/address-spaces.h"
> > > +#include "hw/acpi/acpi_aml_interface.h"
> > > +#include "hw/acpi/tpm.h"
> > >   #include "hw/qdev-properties.h"
> > >   #include "hw/pci/pci_ids.h"
> > >   #include "hw/acpi/tpm.h"
> > > @@ -99,6 +101,11 @@ static void tpm_crb_isa_realize(DeviceState *dev, Error **errp)
> > >           return;
> > >       }
> > >
> > > +    if (tpm_crb_isa_get_version(TPM_IF(s)) != TPM_VERSION_2_0) {
> > > +        error_setg(errp, "TPM CRB only supports TPM 2.0 backends");
> > > +        return;
> > > +    }
> > > +
> > >       tpm_crb_init_memory(OBJECT(s), &s->state, errp);
> > >
> > >       memory_region_add_subregion(isa_address_space(ISA_DEVICE(dev)),
> > > @@ -116,10 +123,30 @@ static void tpm_crb_isa_realize(DeviceState *dev, Error **errp)
> > >       }
> > >   }
> > >
> > > +static void build_tpm_crb_isa_aml(AcpiDevAmlIf *adev, Aml *scope)
> > > +{
> > > +    Aml *dev, *crs;
> > > +    CRBState *s = CRB(adev);
> > > +    TPMIf *ti = TPM_IF(s);
> > > +
> > > +    dev = aml_device("TPM");
> > > +    aml_append(dev, aml_name_decl("_HID", aml_string("MSFT0101")));
> > > +    aml_append(dev, aml_name_decl("_STR", aml_string("TPM 2.0 Device")));
> > > +    aml_append(dev, aml_name_decl("_UID", aml_int(1)));
> > > +    aml_append(dev, aml_name_decl("_STA", aml_int(0xF)));
> > > +    crs = aml_resource_template();
> > > +    aml_append(crs, aml_memory32_fixed(TPM_CRB_ADDR_BASE, TPM_CRB_ADDR_SIZE,
> > > +                                      AML_READ_WRITE));
> > > +    aml_append(dev, aml_name_decl("_CRS", crs));
> > > +    tpm_build_ppi_acpi(ti, dev);
> > > +    aml_append(scope, dev);
> > > +}
> > > +
> > >   static void tpm_crb_isa_class_init(ObjectClass *klass, void *data)
> > >   {
> > >       DeviceClass *dc = DEVICE_CLASS(klass);
> > >       TPMIfClass *tc = TPM_IF_CLASS(klass);
> > > +    AcpiDevAmlIfClass *adevc = ACPI_DEV_AML_IF_CLASS(klass);
> > >
> > >       dc->realize = tpm_crb_isa_realize;
> > >       device_class_set_props(dc, tpm_crb_isa_properties);
> > > @@ -128,6 +155,7 @@ static void tpm_crb_isa_class_init(ObjectClass *klass, void *data)
> > >       tc->model = TPM_MODEL_TPM_CRB;
> > >       tc->get_version = tpm_crb_isa_get_version;
> > >       tc->request_completed = tpm_crb_isa_request_completed;
> > > +    adevc->build_dev_aml = build_tpm_crb_isa_aml;
> > >
> > >       set_bit(DEVICE_CATEGORY_MISC, dc->categories);
> > >   }
> > > @@ -139,6 +167,7 @@ static const TypeInfo tpm_crb_isa_info = {
> > >       .class_init  = tpm_crb_isa_class_init,
> > >       .interfaces = (InterfaceInfo[]) {
> > >           { TYPE_TPM_IF },
> > > +        { TYPE_ACPI_DEV_AML_IF },
> > >           { }
> > >       }
> > >   };
> >
>
Stefan Berger Aug. 1, 2023, 7:38 p.m. UTC | #4
On 7/31/23 23:02, Joelle van Dyne wrote:
> On Mon, Jul 17, 2023 at 6:42 AM Igor Mammedov <imammedo@redhat.com> wrote:
>>
>> On Fri, 14 Jul 2023 13:21:33 -0400
>> Stefan Berger <stefanb@linux.ibm.com> wrote:
>>
>>> On 7/14/23 03:09, Joelle van Dyne wrote:
>>>> This logic is similar to TPM TIS ISA device. Since TPM CRB can only
>>>> support TPM 2.0 backends, we check for this in realize.
>>>>
>>>> Signed-off-by: Joelle van Dyne <j@getutm.app>
>>>
>>> This patch changes the order of in which the ACPI table elements are created but doesn't matter and also doesn't seem to upset ACPI test cases from what I saw:
>>
>> it seems we do have tests for TIS only (which I added when I was refactoring it to TYPE_ACPI_DEV_AML_IF)
>> perhaps add a test for CRB before this patch a follow process described in bios-tables-test.c
>> for updating expected blob
> I read the file and looked at the commits for TIS tests but I'm not
> sure I understand how it works. At what point do I specify that the
> CRB device should be created for the test?

For me it would be a bit of trial an error as well. So here's my best guess:

Did you look at b193e5f9cccb322b0febd5a2aba486? You basically have to find out which files
are going to change due to extending the tests, so doing something like in that patch comes
after you found out which files are changing and iirc the tests are going to complain about
those files. So I would try to first add CRB tests similar to the following to tests/qtest/bios-tables-test.c.
in one patch, then run the test cases and they will tell you which files changed, and then
add a patch similar to b193e5f9cccb322b0febd5a2aba486 before the test-enabling patch.

             if (tpm_model_is_available("-machine q35", "tpm-tis")) {
                 qtest_add_func("acpi/q35/tpm2-tis", test_acpi_q35_tcg_tpm2_tis);
                 qtest_add_func("acpi/q35/tpm12-tis",
                                test_acpi_q35_tcg_tpm12_tis);
             }

I would try to something like the above to aarch64 here:

     } else if (strcmp(arch, "aarch64") == 0) {
         if (has_tcg && qtest_has_device("virtio-blk-pci")) {
             qtest_add_func("acpi/virt", test_acpi_virt_tcg);
             qtest_add_func("acpi/virt/acpihmatvirt",
                             test_acpi_virt_tcg_acpi_hmat);


Then you run the tests again then it should create those files with the ACPI data and you copy them
to their destination (like in ca745d2277496464b54fd832c15c45d0227325bb) and remove the changes from
tests/qtest/bios-tables-test-allowed-diff.h and that becomes your 3rd patch. Once you run the tests
again with the 3rd patch there should be no more complaints about ACPI related changes.

Since CRB ACPI tests are not enabled right now you can add these patches somewhere in the middle of
the series or also at the end.


I hope this helps.

    Stefan
Igor Mammedov Aug. 7, 2023, 10:20 a.m. UTC | #5
On Tue, 1 Aug 2023 15:38:32 -0400
Stefan Berger <stefanb@linux.ibm.com> wrote:

> On 7/31/23 23:02, Joelle van Dyne wrote:
> > On Mon, Jul 17, 2023 at 6:42 AM Igor Mammedov <imammedo@redhat.com> wrote:  
> >>
> >> On Fri, 14 Jul 2023 13:21:33 -0400
> >> Stefan Berger <stefanb@linux.ibm.com> wrote:
> >>  
> >>> On 7/14/23 03:09, Joelle van Dyne wrote:  
> >>>> This logic is similar to TPM TIS ISA device. Since TPM CRB can only
> >>>> support TPM 2.0 backends, we check for this in realize.
> >>>>
> >>>> Signed-off-by: Joelle van Dyne <j@getutm.app>  
> >>>
> >>> This patch changes the order of in which the ACPI table elements are created but doesn't matter and also doesn't seem to upset ACPI test cases from what I saw:  
> >>
> >> it seems we do have tests for TIS only (which I added when I was refactoring it to TYPE_ACPI_DEV_AML_IF)
> >> perhaps add a test for CRB before this patch a follow process described in bios-tables-test.c
> >> for updating expected blob  
> > I read the file and looked at the commits for TIS tests but I'm not
> > sure I understand how it works. At what point do I specify that the
> > CRB device should be created for the test?  
> 
> For me it would be a bit of trial an error as well. So here's my best guess:
[...]
> Then you run the tests again then it should create those files with the ACPI data and you copy them
> to their destination (like in ca745d2277496464b54fd832c15c45d0227325bb) and remove the changes from
> tests/qtest/bios-tables-test-allowed-diff.h and that becomes your 3rd patch. Once you run the tests
> again with the 3rd patch there should be no more complaints about ACPI related changes.

ACPI tables update procedure as described bios-tables-test.c looks more or less
reasonable to me (heavily biased view) for someone else to follow. It shouldn't
be 'trial an error'. If something is unclear in the process, lets improve
description (while your mind is still not poisoned by knowledge how it works). 

Here is latest patches that one can use as a model for changing ACPI tables.
45d9d318c8 tests: acpi: x86: whitelist expected blobs
44d975ef34 x86: acpi: workaround Windows not handling name references in Package properly
6e510855a9 tests: acpi: x86: update expected blobs

> Since CRB ACPI tests are not enabled right now you can add these patches somewhere in the middle of
> the series or also at the end.
> 
> 
> I hope this helps.
> 
>     Stefan
>
diff mbox series

Patch

diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index 9c74fa17ad..b767df39df 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -1441,9 +1441,6 @@  build_dsdt(GArray *table_data, BIOSLinker *linker,
     uint32_t nr_mem = machine->ram_slots;
     int root_bus_limit = 0xFF;
     PCIBus *bus = NULL;
-#ifdef CONFIG_TPM
-    TPMIf *tpm = tpm_find();
-#endif
     bool cxl_present = false;
     int i;
     VMBusBridge *vmbus_bridge = vmbus_bridge_find();
@@ -1793,26 +1790,6 @@  build_dsdt(GArray *table_data, BIOSLinker *linker,
         }
     }
 
-#ifdef CONFIG_TPM
-    if (TPM_IS_CRB(tpm)) {
-        dev = aml_device("TPM");
-        aml_append(dev, aml_name_decl("_HID", aml_string("MSFT0101")));
-        aml_append(dev, aml_name_decl("_STR",
-                                      aml_string("TPM 2.0 Device")));
-        crs = aml_resource_template();
-        aml_append(crs, aml_memory32_fixed(TPM_CRB_ADDR_BASE,
-                                           TPM_CRB_ADDR_SIZE, AML_READ_WRITE));
-        aml_append(dev, aml_name_decl("_CRS", crs));
-
-        aml_append(dev, aml_name_decl("_STA", aml_int(0xf)));
-        aml_append(dev, aml_name_decl("_UID", aml_int(1)));
-
-        tpm_build_ppi_acpi(tpm, dev);
-
-        aml_append(sb_scope, dev);
-    }
-#endif
-
     if (pcms->sgx_epc.size != 0) {
         uint64_t epc_base = pcms->sgx_epc.base;
         uint64_t epc_size = pcms->sgx_epc.size;
diff --git a/hw/tpm/tpm_crb.c b/hw/tpm/tpm_crb.c
index 6144081d30..594696ffb8 100644
--- a/hw/tpm/tpm_crb.c
+++ b/hw/tpm/tpm_crb.c
@@ -19,6 +19,8 @@ 
 #include "qemu/module.h"
 #include "qapi/error.h"
 #include "exec/address-spaces.h"
+#include "hw/acpi/acpi_aml_interface.h"
+#include "hw/acpi/tpm.h"
 #include "hw/qdev-properties.h"
 #include "hw/pci/pci_ids.h"
 #include "hw/acpi/tpm.h"
@@ -99,6 +101,11 @@  static void tpm_crb_isa_realize(DeviceState *dev, Error **errp)
         return;
     }
 
+    if (tpm_crb_isa_get_version(TPM_IF(s)) != TPM_VERSION_2_0) {
+        error_setg(errp, "TPM CRB only supports TPM 2.0 backends");
+        return;
+    }
+
     tpm_crb_init_memory(OBJECT(s), &s->state, errp);
 
     memory_region_add_subregion(isa_address_space(ISA_DEVICE(dev)),
@@ -116,10 +123,30 @@  static void tpm_crb_isa_realize(DeviceState *dev, Error **errp)
     }
 }
 
+static void build_tpm_crb_isa_aml(AcpiDevAmlIf *adev, Aml *scope)
+{
+    Aml *dev, *crs;
+    CRBState *s = CRB(adev);
+    TPMIf *ti = TPM_IF(s);
+
+    dev = aml_device("TPM");
+    aml_append(dev, aml_name_decl("_HID", aml_string("MSFT0101")));
+    aml_append(dev, aml_name_decl("_STR", aml_string("TPM 2.0 Device")));
+    aml_append(dev, aml_name_decl("_UID", aml_int(1)));
+    aml_append(dev, aml_name_decl("_STA", aml_int(0xF)));
+    crs = aml_resource_template();
+    aml_append(crs, aml_memory32_fixed(TPM_CRB_ADDR_BASE, TPM_CRB_ADDR_SIZE,
+                                      AML_READ_WRITE));
+    aml_append(dev, aml_name_decl("_CRS", crs));
+    tpm_build_ppi_acpi(ti, dev);
+    aml_append(scope, dev);
+}
+
 static void tpm_crb_isa_class_init(ObjectClass *klass, void *data)
 {
     DeviceClass *dc = DEVICE_CLASS(klass);
     TPMIfClass *tc = TPM_IF_CLASS(klass);
+    AcpiDevAmlIfClass *adevc = ACPI_DEV_AML_IF_CLASS(klass);
 
     dc->realize = tpm_crb_isa_realize;
     device_class_set_props(dc, tpm_crb_isa_properties);
@@ -128,6 +155,7 @@  static void tpm_crb_isa_class_init(ObjectClass *klass, void *data)
     tc->model = TPM_MODEL_TPM_CRB;
     tc->get_version = tpm_crb_isa_get_version;
     tc->request_completed = tpm_crb_isa_request_completed;
+    adevc->build_dev_aml = build_tpm_crb_isa_aml;
 
     set_bit(DEVICE_CATEGORY_MISC, dc->categories);
 }
@@ -139,6 +167,7 @@  static const TypeInfo tpm_crb_isa_info = {
     .class_init  = tpm_crb_isa_class_init,
     .interfaces = (InterfaceInfo[]) {
         { TYPE_TPM_IF },
+        { TYPE_ACPI_DEV_AML_IF },
         { }
     }
 };