Message ID | 8a127608cf6194a6d288289f2520bd1744b81437.1690350252.git.research_trasio@irq.a4lg.com (mailing list archive) |
---|---|
State | Accepted |
Commit | 58473e8abbc68dad4a3c5f4fce6c6b32c85cbe28 |
Headers | show |
Series | RISC-V: clarification of the QEMU workaround in the ISA parser | expand |
Context | Check | Description |
---|---|---|
conchuod/cover_letter | success | Series has a cover letter |
conchuod/tree_selection | success | Guessed tree name to be for-next at HEAD 471aba2e4760 |
conchuod/fixes_present | success | Fixes tag not required for -next series |
conchuod/maintainers_pattern | success | MAINTAINERS pattern errors before the patch: 4 and now 4 |
conchuod/verify_signedoff | success | Signed-off-by tag matches author and committer |
conchuod/kdoc | success | Errors and warnings before: 0 this patch: 0 |
conchuod/build_rv64_clang_allmodconfig | success | Errors and warnings before: 9 this patch: 9 |
conchuod/module_param | success | Was 0 now: 0 |
conchuod/build_rv64_gcc_allmodconfig | success | Errors and warnings before: 9 this patch: 9 |
conchuod/build_rv32_defconfig | success | Build OK |
conchuod/dtb_warn_rv64 | success | Errors and warnings before: 3 this patch: 3 |
conchuod/header_inline | success | No static functions without inline keyword in header files |
conchuod/checkpatch | success | total: 0 errors, 0 warnings, 0 checks, 15 lines checked |
conchuod/build_rv64_nommu_k210_defconfig | success | Build OK |
conchuod/verify_fixes | success | No Fixes tag |
conchuod/build_rv64_nommu_virt_defconfig | success | Build OK |
On Wed, Jul 26, 2023 at 05:44:16AM +0000, Tsukasa OI wrote: > From: Tsukasa OI <research_trasio@irq.a4lg.com> > > Extensions prefixed with "Su" won't corrupt the workaround in many > cases. The only exception is when the first multi-letter extension in the > ISA string begins with "Su" and is not prefixed with an underscore. > > For instance, following ISA string can confuse this QEMU workaround. > > * "rv64imacsuclic" (RV64I + M + A + C + "Suclic") > > However, this case is very unlikely because extensions prefixed by either > "Z", "Sm" or "Ss" will most likely precede first. > > For instance, the "Suclic" extension (draft as of now) will be placed after > related "Smclic" and "Ssclic" extensions. It's also highly likely that > other unprivileged extensions like "Zba" will precede. > > It's also possible to suppress the issue in the QEMU workaround with an > underscore. Following ISA string won't confuse the QEMU workaround. > > * "rv64imac_suclic" (RV64I + M + A + C + delimited "Suclic") > > This fix is to tell kernel developers the nature of this workaround > precisely. There are some "Su*" extensions to be ratified but don't worry > about this workaround too much. > > This commit comes with other minor editorial fixes (for minor wording and > spacing issues, without changing the meaning). > > Signed-off-by: Tsukasa OI <research_trasio@irq.a4lg.com> Pretty sure I gave you a Reviewed-by last time? Nevertheless, Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Thanks, Conor.
diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c index a8f66c015229..5b2ac109980c 100644 --- a/arch/riscv/kernel/cpufeature.c +++ b/arch/riscv/kernel/cpufeature.c @@ -169,10 +169,11 @@ void __init riscv_fill_hwcap(void) switch (*ext) { case 's': /* - * Workaround for invalid single-letter 's' & 'u'(QEMU). - * No need to set the bit in riscv_isa as 's' & 'u' are - * not valid ISA extensions. It works until multi-letter - * extension starting with "Su" appears. + * Workaround for invalid single-letters 's' & 'u' (QEMU). + * No need to set the bits in riscv_isa as 's' and 'u' are + * not valid ISA extensions. It works unless the first multi-letter + * extension in the ISA string begins with "Su" and is not prefixed + * with an underscore. */ if (ext[-1] != '_' && ext[1] == 'u') { ++isa;