diff mbox series

[v5,2/6] dt-bindings: phy: qcom,m31: Document qcom,m31 USB phy

Message ID 131eb1694229436919ac88bb9920fb54d6808388.1689913334.git.quic_varada@quicinc.com (mailing list archive)
State New, archived
Headers show
Series Enable IPQ5332 USB2 | expand

Commit Message

Varadarajan Narayanan July 21, 2023, 4:35 a.m. UTC 
Document the M31 USB2 phy present in IPQ5332.

Signed-off-by: Sricharan Ramabadhran <quic_srichara@quicinc.com>
Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
---
v5:
	Add '#phy-cells', to be able to use generic phy
	Remove 'Reviewed-by: Krzysztof Kozlowski' due to above change
v4:
	Move M31 URL to description
	Remove maxItems and relevant content from clock-names
	Change node name to generic name
	'make dt_binding_check DT_SCHEMA_FILES=qcom' passed
v3:
	Incorporate review comments. Will bring in ipq5018 compatible
	string while posting ipq5018 usb patchset.

v1:
	Rename qcom,m31.yaml -> qcom,ipq5332-usb-hsphy.yaml
	Drop default binding "m31,usb-hsphy"
	Add clock
	Remove 'oneOf' from compatible
	Remove 'qscratch' region from register space as it is not needed
	Remove reset-names
	Fix the example definition
---
 .../bindings/phy/qcom,ipq5332-usb-hsphy.yaml       | 51 ++++++++++++++++++++++
 1 file changed, 51 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/phy/qcom,ipq5332-usb-hsphy.yaml

Comments

Bjorn Andersson July 22, 2023, 5:10 a.m. UTC | #1 
On Fri, Jul 21, 2023 at 10:05:27AM +0530, Varadarajan Narayanan wrote:
> Document the M31 USB2 phy present in IPQ5332.
> 
> Signed-off-by: Sricharan Ramabadhran <quic_srichara@quicinc.com>

As Sricharan is the first one to certify the patch's origin, it seems
likely that he's the author. Please add a Co-developed-by: Sricharan.

[..]
> diff --git a/Documentation/devicetree/bindings/phy/qcom,ipq5332-usb-hsphy.yaml b/Documentation/devicetree/bindings/phy/qcom,ipq5332-usb-hsphy.yaml
> new file mode 100644
> index 0000000..e0b282b
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/phy/qcom,ipq5332-usb-hsphy.yaml
> @@ -0,0 +1,51 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/phy/qcom,ipq5332-usb-hsphy.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: M31 USB PHY
> +
> +maintainers:
> +  - Sricharan Ramabadhran <quic_srichara@quicinc.com>
> +  - Varadarajan Narayanan <quic_varada@quicinc.com>
> +
> +description:
> +  USB M31 PHY (https://www.m31tech.com) found in Qualcomm
> +  IPQ5018, IPQ5332 SoCs.
> +
> +properties:
> +  "#phy-cells":
> +    const: 0
> +
> +  compatible:
> +    enum:

const?

> +      - qcom,ipq5332-usb-hsphy
> +
> +  reg:
> +    maxItems: 1
> +
> +  clocks:
> +    maxItems: 1
> +
> +  clock-names:
> +    items:
> +      - const: cfg_ahb
> +
> +  resets:
> +    maxItems: 1
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    #include <dt-bindings/clock/qcom,ipq5332-gcc.h>
> +    usbphy0: usb-phy@7b000 {

usb@

And you don't need to give the node a label in the example.

> +        compatible = "qcom,ipq5332-usb-hsphy";
> +        reg = <0x0007b000 0x12c>;
> +
> +        clocks = <&gcc GCC_USB0_PHY_CFG_AHB_CLK>;
> +        clock-names = "cfg_ahb";
> +

No #phy-cells?

Regards,
Bjorn

> +        resets = <&gcc GCC_QUSB2_0_PHY_BCR>;
> +    };
> -- 
> 2.7.4
>
Varadarajan Narayanan July 27, 2023, 6:39 a.m. UTC | #2 
Bjorn & Rob,

On Tue, Jul 25, 2023 at 10:24:15PM -0700, Bjorn Andersson wrote:
> On Mon, Jul 24, 2023 at 10:01:36AM -0600, Rob Herring wrote:
> > On Fri, Jul 21, 2023 at 10:10:57PM -0700, Bjorn Andersson wrote:
> > > On Fri, Jul 21, 2023 at 10:05:27AM +0530, Varadarajan Narayanan wrote:
> > > [..]
> > > > diff --git a/Documentation/devicetree/bindings/phy/qcom,ipq5332-usb-hsphy.yaml b/Documentation/devicetree/bindings/phy/qcom,ipq5332-usb-hsphy.yaml
> [..]
> > > > +examples:
> > > > +  - |
> > > > +    #include <dt-bindings/clock/qcom,ipq5332-gcc.h>
> > > > +    usbphy0: usb-phy@7b000 {
> > >
> > > usb@
> >
> > You mean phy@? But 'usb2-phy' is accepted too.
> >
>
> Yes, had the controller in mind, sorry about that.

Have posted a new patchset addressing the comments.
Please provide your feedback.

Thanks
Varada
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/phy/qcom,ipq5332-usb-hsphy.yaml b/Documentation/devicetree/bindings/phy/qcom,ipq5332-usb-hsphy.yaml
new file mode 100644
index 0000000..e0b282b
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/qcom,ipq5332-usb-hsphy.yaml
@@ -0,0 +1,51 @@ 
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/phy/qcom,ipq5332-usb-hsphy.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: M31 USB PHY
+
+maintainers:
+  - Sricharan Ramabadhran <quic_srichara@quicinc.com>
+  - Varadarajan Narayanan <quic_varada@quicinc.com>
+
+description:
+  USB M31 PHY (https://www.m31tech.com) found in Qualcomm
+  IPQ5018, IPQ5332 SoCs.
+
+properties:
+  "#phy-cells":
+    const: 0
+
+  compatible:
+    enum:
+      - qcom,ipq5332-usb-hsphy
+
+  reg:
+    maxItems: 1
+
+  clocks:
+    maxItems: 1
+
+  clock-names:
+    items:
+      - const: cfg_ahb
+
+  resets:
+    maxItems: 1
+
+additionalProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/clock/qcom,ipq5332-gcc.h>
+    usbphy0: usb-phy@7b000 {
+        compatible = "qcom,ipq5332-usb-hsphy";
+        reg = <0x0007b000 0x12c>;
+
+        clocks = <&gcc GCC_USB0_PHY_CFG_AHB_CLK>;
+        clock-names = "cfg_ahb";
+
+        resets = <&gcc GCC_QUSB2_0_PHY_BCR>;
+    };