Message ID | c39836607097b09119a4f4480c77506295333a55.1691053438.git.simone.ballarin@bugseng.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | xen: address violations of MISRA C:2012 Rule 7.3 | expand |
> On 3 Aug 2023, at 11:22, Simone Ballarin <simone.ballarin@bugseng.com> wrote: > > From: Gianluca Luparini <gianluca.luparini@bugseng.com> > > The xen sources contain violations of MISRA C:2012 Rule 7.3 whose headline > states: > "The lowercase character 'l' shall not be used in a literal suffix". > > Use the "L" suffix instead of the "l" suffix, to avoid potential ambiguity. > If the "u" suffix is used near "L", use the "U" suffix instead, for consistency. > > The changes in this patch are mechanical. > > Signed-off-by: Gianluca Luparini <gianluca.luparini@bugseng.com> > Signed-off-by: Simone Ballarin <simone.ballarin@bugseng.com> > --- Reviewed-by: Luca Fancellu <luca.fancellu@arm.com>
On Thu, 3 Aug 2023, Simone Ballarin wrote: > From: Gianluca Luparini <gianluca.luparini@bugseng.com> > > The xen sources contain violations of MISRA C:2012 Rule 7.3 whose headline > states: > "The lowercase character 'l' shall not be used in a literal suffix". > > Use the "L" suffix instead of the "l" suffix, to avoid potential ambiguity. > If the "u" suffix is used near "L", use the "U" suffix instead, for consistency. > > The changes in this patch are mechanical. > > Signed-off-by: Gianluca Luparini <gianluca.luparini@bugseng.com> > Signed-off-by: Simone Ballarin <simone.ballarin@bugseng.com> Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
diff --git a/xen/arch/arm/include/asm/processor.h b/xen/arch/arm/include/asm/processor.h index 7e42ff8811..8e02410465 100644 --- a/xen/arch/arm/include/asm/processor.h +++ b/xen/arch/arm/include/asm/processor.h @@ -521,9 +521,9 @@ extern register_t __cpu_logical_map[]; #define CNTKCTL_EL1_EL0PTEN (1u<<9) /* Expose phys timer registers to EL0 */ /* Timer control registers */ -#define CNTx_CTL_ENABLE (1ul<<0) /* Enable timer */ -#define CNTx_CTL_MASK (1ul<<1) /* Mask IRQ */ -#define CNTx_CTL_PENDING (1ul<<2) /* IRQ pending */ +#define CNTx_CTL_ENABLE (1UL<<0) /* Enable timer */ +#define CNTx_CTL_MASK (1UL<<1) /* Mask IRQ */ +#define CNTx_CTL_PENDING (1UL<<2) /* IRQ pending */ /* Timer frequency mask */ #define CNTFRQ_MASK GENMASK(31, 0) diff --git a/xen/arch/arm/vtimer.c b/xen/arch/arm/vtimer.c index 48f2daa907..c54360e202 100644 --- a/xen/arch/arm/vtimer.c +++ b/xen/arch/arm/vtimer.c @@ -206,7 +206,7 @@ static bool vtimer_cntp_tval(struct cpu_user_regs *regs, register_t *r, if ( read ) { - *r = (uint32_t)((v->arch.phys_timer.cval - cntpct) & 0xffffffffull); + *r = (uint32_t)((v->arch.phys_timer.cval - cntpct) & 0xffffffffULL); } else {