| Message ID | 20230731023701.2581713-1-contact@jookia.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | riscv: dts: allwinner: d1: Specify default CAN pins | expand |
Dne ponedeljek, 31. julij 2023 ob 04:36:59 CEST je John Watts napisal(a): > There are only one set of CAN pins available on these chips. > Specify these as the default to avoid redundancy in board device trees. > > Signed-off-by: John Watts <contact@jookia.org> > --- > arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi > b/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi index > 4086c0cc0f9d..b27c3fc13b0d 100644 > --- a/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi > +++ b/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi > @@ -898,6 +898,8 @@ can0: can@2504000 { > interrupts = <SOC_PERIPHERAL_IRQ(21) IRQ_TYPE_LEVEL_HIGH>; > clocks = <&ccu CLK_BUS_CAN0>; > resets = <&ccu RST_BUS_CAN0>; > + pinctrl-names = "default"; > + pinctrl-0 = <&can0_pins>; > status = "disabled"; > }; > > @@ -907,6 +909,8 @@ can1: can@2504400 { > interrupts = <SOC_PERIPHERAL_IRQ(22) IRQ_TYPE_LEVEL_HIGH>; > clocks = <&ccu CLK_BUS_CAN1>; > resets = <&ccu RST_BUS_CAN1>; > + pinctrl-names = "default"; > + pinctrl-0 = <&can1_pins>; > status = "disabled"; > }; > };
/cc Marc Dne ponedeljek, 31. julij 2023 ob 04:36:59 CEST je John Watts napisal(a): > There are only one set of CAN pins available on these chips. > Specify these as the default to avoid redundancy in board device trees. > > Signed-off-by: John Watts <contact@jookia.org> > --- > arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi > b/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi index > 4086c0cc0f9d..b27c3fc13b0d 100644 > --- a/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi > +++ b/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi > @@ -898,6 +898,8 @@ can0: can@2504000 { > interrupts = <SOC_PERIPHERAL_IRQ(21) IRQ_TYPE_LEVEL_HIGH>; > clocks = <&ccu CLK_BUS_CAN0>; > resets = <&ccu RST_BUS_CAN0>; > + pinctrl-names = "default"; > + pinctrl-0 = <&can0_pins>; > status = "disabled"; > }; pinctrl-names and pinctrl-0 are usually at the top. However, since there is no hard rule (I've seen it mixed), I'm fine with it. Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com> Since original DT node entry goes through netdev tree, this should be picked there or it can be dropped there and I pick both patches or I can pick patch for later kernel version. Best regards, Jernej > > @@ -907,6 +909,8 @@ can1: can@2504400 { > interrupts = <SOC_PERIPHERAL_IRQ(22) IRQ_TYPE_LEVEL_HIGH>; > clocks = <&ccu CLK_BUS_CAN1>; > resets = <&ccu RST_BUS_CAN1>; > + pinctrl-names = "default"; > + pinctrl-0 = <&can1_pins>; > status = "disabled"; > }; > };
On Thu, Aug 03, 2023 at 10:59:30PM +0200, Jernej Škrabec wrote: > pinctrl-names and pinctrl-0 are usually at the top. However, since there is no > hard rule (I've seen it mixed), I'm fine with it. Happy to change if needed. > Since original DT node entry goes through netdev tree, this should be picked > there or it can be dropped there and I pick both patches or I can pick patch > for later kernel version. Do I have to do something based on this, like resend my patch? > Best regards, > Jernej John
Dne petek, 04. avgust 2023 ob 08:25:42 CEST je John Watts napisal(a): > On Thu, Aug 03, 2023 at 10:59:30PM +0200, Jernej Škrabec wrote: > > pinctrl-names and pinctrl-0 are usually at the top. However, since there > > is no hard rule (I've seen it mixed), I'm fine with it. > > Happy to change if needed. If you don't mind, please do. > > > Since original DT node entry goes through netdev tree, this should be > > picked there or it can be dropped there and I pick both patches or I can > > pick patch for later kernel version. > > Do I have to do something based on this, like resend my patch? Nothing on your side. Marc, since you took original patch through netdev tree, what is your decision here? Best regards, Jernej > > > Best regards, > > Jernej > > John
On Fri, Aug 04, 2023 at 04:39:41PM +0200, Jernej Škrabec wrote:
> If you don't mind, please do.
Just to clarify, something like this:
can0: can@2504000 {
pinctrl-names = "default";
pinctrl-0 = <&can0_pins>;
compatible = "allwinner,sun20i-d1-can";
reg = <0x02504000 0x400>;
interrupts = <SOC_PERIPHERAL_IRQ(21) IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_BUS_CAN0>;
resets = <&ccu RST_BUS_CAN0>;
status = "disabled";
};
I couldn't find any dtsi files that put pinctrl stuff at the top.
John.
On 04.08.2023 16:39:41, Jernej Škrabec wrote: > Dne petek, 04. avgust 2023 ob 08:25:42 CEST je John Watts napisal(a): > > On Thu, Aug 03, 2023 at 10:59:30PM +0200, Jernej Škrabec wrote: > > > pinctrl-names and pinctrl-0 are usually at the top. However, since there > > > is no hard rule (I've seen it mixed), I'm fine with it. > > > > Happy to change if needed. > > If you don't mind, please do. > > > > > > Since original DT node entry goes through netdev tree, this should be > > > picked there or it can be dropped there and I pick both patches or I can > > > pick patch for later kernel version. > > > > Do I have to do something based on this, like resend my patch? > > Nothing on your side. > > Marc, since you took original patch through netdev tree, what is your decision > here? I'll take the DT patches though linux-can-next to net-next. regards, Marc
On Fri, Aug 4, 2023 at 4:59 AM Jernej Škrabec <jernej.skrabec@gmail.com> wrote: > > /cc Marc > > Dne ponedeljek, 31. julij 2023 ob 04:36:59 CEST je John Watts napisal(a): > > There are only one set of CAN pins available on these chips. > > Specify these as the default to avoid redundancy in board device trees. > > > > Signed-off-by: John Watts <contact@jookia.org> > > --- > > arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi | 4 ++++ > > 1 file changed, 4 insertions(+) > > > > diff --git a/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi > > b/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi index > > 4086c0cc0f9d..b27c3fc13b0d 100644 > > --- a/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi > > +++ b/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi > > @@ -898,6 +898,8 @@ can0: can@2504000 { > > interrupts = <SOC_PERIPHERAL_IRQ(21) > IRQ_TYPE_LEVEL_HIGH>; > > clocks = <&ccu CLK_BUS_CAN0>; > > resets = <&ccu RST_BUS_CAN0>; > > + pinctrl-names = "default"; > > + pinctrl-0 = <&can0_pins>; > > status = "disabled"; > > }; > > pinctrl-names and pinctrl-0 are usually at the top. However, since there is no > hard rule (I've seen it mixed), I'm fine with it. AFAIK this only applies to board files where there are mostly none of the resource (clocks, reg, resets, interrupts) properties. OOTH the compatible property is always the first property. I would normally put the pinctrl stuff after the internal resources, since it is an external property. In the SoC dtsi files, they would end up after the resource properties I mentioned above, and before the "status" property. ChenYu > Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com> > > Since original DT node entry goes through netdev tree, this should be picked > there or it can be dropped there and I pick both patches or I can pick patch > for later kernel version. > > Best regards, > Jernej > > > > > @@ -907,6 +909,8 @@ can1: can@2504400 { > > interrupts = <SOC_PERIPHERAL_IRQ(22) > IRQ_TYPE_LEVEL_HIGH>; > > clocks = <&ccu CLK_BUS_CAN1>; > > resets = <&ccu RST_BUS_CAN1>; > > + pinctrl-names = "default"; > > + pinctrl-0 = <&can1_pins>; > > status = "disabled"; > > }; > > }; > > > >
diff --git a/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi b/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi index 4086c0cc0f9d..b27c3fc13b0d 100644 --- a/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi +++ b/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi @@ -898,6 +898,8 @@ can0: can@2504000 { interrupts = <SOC_PERIPHERAL_IRQ(21) IRQ_TYPE_LEVEL_HIGH>; clocks = <&ccu CLK_BUS_CAN0>; resets = <&ccu RST_BUS_CAN0>; + pinctrl-names = "default"; + pinctrl-0 = <&can0_pins>; status = "disabled"; }; @@ -907,6 +909,8 @@ can1: can@2504400 { interrupts = <SOC_PERIPHERAL_IRQ(22) IRQ_TYPE_LEVEL_HIGH>; clocks = <&ccu CLK_BUS_CAN1>; resets = <&ccu RST_BUS_CAN1>; + pinctrl-names = "default"; + pinctrl-0 = <&can1_pins>; status = "disabled"; }; };
There are only one set of CAN pins available on these chips. Specify these as the default to avoid redundancy in board device trees. Signed-off-by: John Watts <contact@jookia.org> --- arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi | 4 ++++ 1 file changed, 4 insertions(+)