| Message ID | 20230728041150.2524032-20-ankit.k.nautiyal@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | DSC misc fixes | expand |
On Fri, Jul 28, 2023 at 09:41:49AM +0530, Ankit Nautiyal wrote: > Use checks for src and sink limits before computing compressed bpp for > eDP. > > Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> > --- > drivers/gpu/drm/i915/display/intel_dp.c | 20 +++++++++++++++++--- > 1 file changed, 17 insertions(+), 3 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c > index 9b71934e662e..0299b378ba6e 100644 > --- a/drivers/gpu/drm/i915/display/intel_dp.c > +++ b/drivers/gpu/drm/i915/display/intel_dp.c > @@ -2032,6 +2032,8 @@ static int intel_edp_dsc_compute_pipe_bpp(struct intel_dp *intel_dp, > { > struct drm_i915_private *i915 = dp_to_i915(intel_dp); > int pipe_bpp, forced_bpp; > + int dsc_src_min_bpp, dsc_sink_min_bpp, dsc_min_bpp; > + int dsc_src_max_bpp, dsc_sink_max_bpp, dsc_max_bpp; > > forced_bpp = intel_dp_force_dsc_pipe_bpp(intel_dp, conn_state, limits); > > @@ -2049,9 +2051,21 @@ static int intel_edp_dsc_compute_pipe_bpp(struct intel_dp *intel_dp, > } > pipe_config->port_clock = limits->max_rate; > pipe_config->lane_count = limits->max_lane_count; > - pipe_config->dsc.compressed_bpp = > - min_t(u16, drm_edp_dsc_sink_output_bpp(intel_dp->dsc_dpcd) >> 4, > - pipe_bpp); > + > + dsc_src_min_bpp = dsc_src_min_compressed_bpp(); > + dsc_sink_min_bpp = intel_dp_dsc_sink_min_compressed_bpp(pipe_config); > + dsc_min_bpp = max(dsc_src_min_bpp, dsc_sink_min_bpp); > + > + dsc_src_max_bpp = dsc_src_max_compressed_bpp(intel_dp); > + dsc_sink_max_bpp = intel_dp_dsc_sink_max_compressed_bpp(intel_dp, > + pipe_config, > + pipe_bpp / 3); > + dsc_max_bpp = dsc_sink_max_bpp ? min(dsc_sink_max_bpp, dsc_src_max_bpp) : dsc_src_max_bpp; > + > + /* Compressed BPP should be less than the Input DSC bpp */ > + dsc_max_bpp = min(dsc_max_bpp, pipe_bpp - 1); > + > + pipe_config->dsc.compressed_bpp = max(dsc_min_bpp, dsc_max_bpp); > > pipe_config->pipe_bpp = pipe_bpp; > > -- > 2.40.1 >
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index 9b71934e662e..0299b378ba6e 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -2032,6 +2032,8 @@ static int intel_edp_dsc_compute_pipe_bpp(struct intel_dp *intel_dp, { struct drm_i915_private *i915 = dp_to_i915(intel_dp); int pipe_bpp, forced_bpp; + int dsc_src_min_bpp, dsc_sink_min_bpp, dsc_min_bpp; + int dsc_src_max_bpp, dsc_sink_max_bpp, dsc_max_bpp; forced_bpp = intel_dp_force_dsc_pipe_bpp(intel_dp, conn_state, limits); @@ -2049,9 +2051,21 @@ static int intel_edp_dsc_compute_pipe_bpp(struct intel_dp *intel_dp, } pipe_config->port_clock = limits->max_rate; pipe_config->lane_count = limits->max_lane_count; - pipe_config->dsc.compressed_bpp = - min_t(u16, drm_edp_dsc_sink_output_bpp(intel_dp->dsc_dpcd) >> 4, - pipe_bpp); + + dsc_src_min_bpp = dsc_src_min_compressed_bpp(); + dsc_sink_min_bpp = intel_dp_dsc_sink_min_compressed_bpp(pipe_config); + dsc_min_bpp = max(dsc_src_min_bpp, dsc_sink_min_bpp); + + dsc_src_max_bpp = dsc_src_max_compressed_bpp(intel_dp); + dsc_sink_max_bpp = intel_dp_dsc_sink_max_compressed_bpp(intel_dp, + pipe_config, + pipe_bpp / 3); + dsc_max_bpp = dsc_sink_max_bpp ? min(dsc_sink_max_bpp, dsc_src_max_bpp) : dsc_src_max_bpp; + + /* Compressed BPP should be less than the Input DSC bpp */ + dsc_max_bpp = min(dsc_max_bpp, pipe_bpp - 1); + + pipe_config->dsc.compressed_bpp = max(dsc_min_bpp, dsc_max_bpp); pipe_config->pipe_bpp = pipe_bpp;
Use checks for src and sink limits before computing compressed bpp for eDP. Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> --- drivers/gpu/drm/i915/display/intel_dp.c | 20 +++++++++++++++++--- 1 file changed, 17 insertions(+), 3 deletions(-)