| Message ID | 20230609144843.851327-1-miquel.raynal@bootlin.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm: atmel-hlcdc: Support inverting the pixel clock polarity | expand |
On Fri, Jun 09, 2023 at 04:48:43PM +0200, Miquel Raynal wrote: > On the SoC host controller, the pixel clock can be: > * standard: data is launched on the rising edge > * inverted: data is launched on the falling edge > > Some panels may need the inverted option to be used so let's support > this DRM flag. > > Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Hi Miquel, the patch is: Reviewed-by: Sam Ravnborg <sam@ravnborg.org> I hope someone else can pick it up and apply it to drm-misc as my drm-misc setup is hopelessly outdated atm. Sam > --- > > Hello, this change was tested on a Sama5d36 based custom board with a > panel not behaving correctly if the pixel clock was not inverted. > Cheers, Miquèl > > .../gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c | 25 +++++++++++++++++++ > 1 file changed, 25 insertions(+) > > diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c > index 58184cd6ab0b..cc5cf4c2faf7 100644 > --- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c > +++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c > @@ -68,7 +68,11 @@ static void atmel_hlcdc_crtc_mode_set_nofb(struct drm_crtc *c) > struct atmel_hlcdc_crtc *crtc = drm_crtc_to_atmel_hlcdc_crtc(c); > struct regmap *regmap = crtc->dc->hlcdc->regmap; > struct drm_display_mode *adj = &c->state->adjusted_mode; > + struct drm_encoder *encoder = NULL, *en_iter; > + struct drm_connector *connector = NULL; > struct atmel_hlcdc_crtc_state *state; > + struct drm_device *ddev = c->dev; > + struct drm_connector_list_iter iter; > unsigned long mode_rate; > struct videomode vm; > unsigned long prate; > @@ -76,6 +80,23 @@ static void atmel_hlcdc_crtc_mode_set_nofb(struct drm_crtc *c) > unsigned int cfg = 0; > int div, ret; > > + /* get encoder from crtc */ > + drm_for_each_encoder(en_iter, ddev) { > + if (en_iter->crtc == c) { > + encoder = en_iter; > + break; > + } > + } > + > + if (encoder) { > + /* Get the connector from encoder */ > + drm_connector_list_iter_begin(ddev, &iter); > + drm_for_each_connector_iter(connector, &iter) > + if (connector->encoder == encoder) > + break; > + drm_connector_list_iter_end(&iter); > + } > + > ret = clk_prepare_enable(crtc->dc->hlcdc->sys_clk); > if (ret) > return; > @@ -134,6 +155,10 @@ static void atmel_hlcdc_crtc_mode_set_nofb(struct drm_crtc *c) > > cfg |= ATMEL_HLCDC_CLKDIV(div); > > + if (connector && > + connector->display_info.bus_flags & DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE) > + cfg |= ATMEL_HLCDC_CLKPOL; > + > regmap_update_bits(regmap, ATMEL_HLCDC_CFG(0), mask, cfg); > > state = drm_crtc_state_to_atmel_hlcdc_crtc_state(c->state); > -- > 2.34.1
Hello, sam@ravnborg.org wrote on Sat, 10 Jun 2023 22:05:15 +0200: > On Fri, Jun 09, 2023 at 04:48:43PM +0200, Miquel Raynal wrote: > > On the SoC host controller, the pixel clock can be: > > * standard: data is launched on the rising edge > > * inverted: data is launched on the falling edge > > > > Some panels may need the inverted option to be used so let's support > > this DRM flag. > > > > Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> > > Hi Miquel, > > the patch is: > Reviewed-by: Sam Ravnborg <sam@ravnborg.org> > > I hope someone else can pick it up and apply it to drm-misc as > my drm-misc setup is hopelessly outdated atm. Looks like nobody picked this up yet, can someone take it? Let me know if you want me to send it again. Thanks, Miquèl
Hi Sam, sam@ravnborg.org wrote on Sat, 10 Jun 2023 22:05:15 +0200: > On Fri, Jun 09, 2023 at 04:48:43PM +0200, Miquel Raynal wrote: > > On the SoC host controller, the pixel clock can be: > > * standard: data is launched on the rising edge > > * inverted: data is launched on the falling edge > > > > Some panels may need the inverted option to be used so let's support > > this DRM flag. > > > > Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> > > Hi Miquel, > > the patch is: > Reviewed-by: Sam Ravnborg <sam@ravnborg.org> > > I hope someone else can pick it up and apply it to drm-misc as > my drm-misc setup is hopelessly outdated atm. I haven't been noticed this patch was picked-up, is your tree still outdated or can you take care of it? Thanks a lot, Miquèl
Hi Miquel, On Mon, Aug 07, 2023 at 11:12:46AM +0200, Miquel Raynal wrote: > Hi Sam, > > sam@ravnborg.org wrote on Sat, 10 Jun 2023 22:05:15 +0200: > > > On Fri, Jun 09, 2023 at 04:48:43PM +0200, Miquel Raynal wrote: > > > On the SoC host controller, the pixel clock can be: > > > * standard: data is launched on the rising edge > > > * inverted: data is launched on the falling edge > > > > > > Some panels may need the inverted option to be used so let's support > > > this DRM flag. > > > > > > Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> > > > > Hi Miquel, > > > > the patch is: > > Reviewed-by: Sam Ravnborg <sam@ravnborg.org> > > > > I hope someone else can pick it up and apply it to drm-misc as > > my drm-misc setup is hopelessly outdated atm. > > I haven't been noticed this patch was picked-up, is your tree still > outdated or can you take care of it? I am still hopelessly behind on stuff. I copied a few people on this mail that I hope can help. Link to the original patch: https://lore.kernel.org/dri-devel/20230609144843.851327-1-miquel.raynal@bootlin.com/ Sam
Hi Sam, sam@ravnborg.org wrote on Mon, 7 Aug 2023 18:52:45 +0200: > Hi Miquel, > > On Mon, Aug 07, 2023 at 11:12:46AM +0200, Miquel Raynal wrote: > > Hi Sam, > > > > sam@ravnborg.org wrote on Sat, 10 Jun 2023 22:05:15 +0200: > > > > > On Fri, Jun 09, 2023 at 04:48:43PM +0200, Miquel Raynal wrote: > > > > On the SoC host controller, the pixel clock can be: > > > > * standard: data is launched on the rising edge > > > > * inverted: data is launched on the falling edge > > > > > > > > Some panels may need the inverted option to be used so let's support > > > > this DRM flag. > > > > > > > > Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> > > > > > > Hi Miquel, > > > > > > the patch is: > > > Reviewed-by: Sam Ravnborg <sam@ravnborg.org> > > > > > > I hope someone else can pick it up and apply it to drm-misc as > > > my drm-misc setup is hopelessly outdated atm. > > > > I haven't been noticed this patch was picked-up, is your tree still > > outdated or can you take care of it? > > I am still hopelessly behind on stuff. No problem. > I copied a few people on this mail that I hope can help. Nice, thanks a lot! > Link to the original patch: > https://lore.kernel.org/dri-devel/20230609144843.851327-1-miquel.raynal@bootlin.com/ > > Sam Let me know in case it's easier if I re-send it. Thanks, Miquèl
On Tue, 8 Aug 2023 08:33:38 +0200 Miquel Raynal <miquel.raynal@bootlin.com> wrote: > Hi Sam, > > sam@ravnborg.org wrote on Mon, 7 Aug 2023 18:52:45 +0200: > > > Hi Miquel, > > > > On Mon, Aug 07, 2023 at 11:12:46AM +0200, Miquel Raynal wrote: > > > Hi Sam, > > > > > > sam@ravnborg.org wrote on Sat, 10 Jun 2023 22:05:15 +0200: > > > > > > > On Fri, Jun 09, 2023 at 04:48:43PM +0200, Miquel Raynal wrote: > > > > > On the SoC host controller, the pixel clock can be: > > > > > * standard: data is launched on the rising edge > > > > > * inverted: data is launched on the falling edge > > > > > > > > > > Some panels may need the inverted option to be used so let's support > > > > > this DRM flag. > > > > > > > > > > Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> > > > > > > > > Hi Miquel, > > > > > > > > the patch is: > > > > Reviewed-by: Sam Ravnborg <sam@ravnborg.org> > > > > > > > > I hope someone else can pick it up and apply it to drm-misc as > > > > my drm-misc setup is hopelessly outdated atm. > > > > > > I haven't been noticed this patch was picked-up, is your tree still > > > outdated or can you take care of it? > > > > I am still hopelessly behind on stuff. > > No problem. I queued it to drm-misc-next this morning. Regards, Boris
> I queued it to drm-misc-next this morning.
Thanks Boris!
Sam
Hi Boris,
sam@ravnborg.org wrote on Thu, 10 Aug 2023 19:31:25 +0200:
> > I queued it to drm-misc-next this morning.
Yeah, thanks a lot!
Cheers,
Miquèl
diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c index 58184cd6ab0b..cc5cf4c2faf7 100644 --- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c +++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c @@ -68,7 +68,11 @@ static void atmel_hlcdc_crtc_mode_set_nofb(struct drm_crtc *c) struct atmel_hlcdc_crtc *crtc = drm_crtc_to_atmel_hlcdc_crtc(c); struct regmap *regmap = crtc->dc->hlcdc->regmap; struct drm_display_mode *adj = &c->state->adjusted_mode; + struct drm_encoder *encoder = NULL, *en_iter; + struct drm_connector *connector = NULL; struct atmel_hlcdc_crtc_state *state; + struct drm_device *ddev = c->dev; + struct drm_connector_list_iter iter; unsigned long mode_rate; struct videomode vm; unsigned long prate; @@ -76,6 +80,23 @@ static void atmel_hlcdc_crtc_mode_set_nofb(struct drm_crtc *c) unsigned int cfg = 0; int div, ret; + /* get encoder from crtc */ + drm_for_each_encoder(en_iter, ddev) { + if (en_iter->crtc == c) { + encoder = en_iter; + break; + } + } + + if (encoder) { + /* Get the connector from encoder */ + drm_connector_list_iter_begin(ddev, &iter); + drm_for_each_connector_iter(connector, &iter) + if (connector->encoder == encoder) + break; + drm_connector_list_iter_end(&iter); + } + ret = clk_prepare_enable(crtc->dc->hlcdc->sys_clk); if (ret) return; @@ -134,6 +155,10 @@ static void atmel_hlcdc_crtc_mode_set_nofb(struct drm_crtc *c) cfg |= ATMEL_HLCDC_CLKDIV(div); + if (connector && + connector->display_info.bus_flags & DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE) + cfg |= ATMEL_HLCDC_CLKPOL; + regmap_update_bits(regmap, ATMEL_HLCDC_CFG(0), mask, cfg); state = drm_crtc_state_to_atmel_hlcdc_crtc_state(c->state);
On the SoC host controller, the pixel clock can be: * standard: data is launched on the rising edge * inverted: data is launched on the falling edge Some panels may need the inverted option to be used so let's support this DRM flag. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> --- Hello, this change was tested on a Sama5d36 based custom board with a panel not behaving correctly if the pixel clock was not inverted. Cheers, Miquèl .../gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c | 25 +++++++++++++++++++ 1 file changed, 25 insertions(+)