diff mbox series

drm/panel: simple: Fix AUO G121EAN01 panel timings according to the docs

Message ID 20230804151239.835216-1-luca.ceresoli@bootlin.com (mailing list archive)
State New, archived
Headers show
Series drm/panel: simple: Fix AUO G121EAN01 panel timings according to the docs | expand

Commit Message

Luca Ceresoli Aug. 4, 2023, 3:12 p.m. UTC
Commit 03e909acd95a ("drm/panel: simple: Add support for AUO G121EAN01.4
panel") added support for this panel model, but the timings it implements
are very different from what the datasheet describes. I checked both the
G121EAN01.0 datasheet from [0] and the G121EAN01.4 one from [1] and they
all have the same timings: for example the LVDS clock typical value is 74.4
MHz, not 66.7 MHz as implemented.

Replace the timings with the ones from the documentation. These timings
have been tested and the clock frequencies verified with an oscilloscope to
ensure they are correct.

Also use struct display_timing instead of struct drm_display_mode in order
to also specify the minimum and maximum values.

[0] https://embedded.avnet.com/product/g121ean01-0/
[1] https://embedded.avnet.com/product/g121ean01-4/

Fixes: 03e909acd95a ("drm/panel: simple: Add support for AUO G121EAN01.4 panel")
Signed-off-by: Luca Ceresoli <luca.ceresoli@bootlin.com>
---
 drivers/gpu/drm/panel/panel-simple.c | 24 ++++++++++++------------
 1 file changed, 12 insertions(+), 12 deletions(-)

Comments

Neil Armstrong Aug. 14, 2023, 12:37 p.m. UTC | #1
On 04/08/2023 17:12, Luca Ceresoli wrote:
> Commit 03e909acd95a ("drm/panel: simple: Add support for AUO G121EAN01.4
> panel") added support for this panel model, but the timings it implements
> are very different from what the datasheet describes. I checked both the
> G121EAN01.0 datasheet from [0] and the G121EAN01.4 one from [1] and they
> all have the same timings: for example the LVDS clock typical value is 74.4
> MHz, not 66.7 MHz as implemented.
> 
> Replace the timings with the ones from the documentation. These timings
> have been tested and the clock frequencies verified with an oscilloscope to
> ensure they are correct.
> 
> Also use struct display_timing instead of struct drm_display_mode in order
> to also specify the minimum and maximum values.
> 
> [0] https://embedded.avnet.com/product/g121ean01-0/
> [1] https://embedded.avnet.com/product/g121ean01-4/
> 
> Fixes: 03e909acd95a ("drm/panel: simple: Add support for AUO G121EAN01.4 panel")
> Signed-off-by: Luca Ceresoli <luca.ceresoli@bootlin.com>
> ---
>   drivers/gpu/drm/panel/panel-simple.c | 24 ++++++++++++------------
>   1 file changed, 12 insertions(+), 12 deletions(-)
> 
> diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c
> index 701013b3ad13..56854f78441e 100644
> --- a/drivers/gpu/drm/panel/panel-simple.c
> +++ b/drivers/gpu/drm/panel/panel-simple.c
> @@ -999,21 +999,21 @@ static const struct panel_desc auo_g104sn02 = {
>   	.connector_type = DRM_MODE_CONNECTOR_LVDS,
>   };
>   
> -static const struct drm_display_mode auo_g121ean01_mode = {
> -	.clock = 66700,
> -	.hdisplay = 1280,
> -	.hsync_start = 1280 + 58,
> -	.hsync_end = 1280 + 58 + 8,
> -	.htotal = 1280 + 58 + 8 + 70,
> -	.vdisplay = 800,
> -	.vsync_start = 800 + 6,
> -	.vsync_end = 800 + 6 + 4,
> -	.vtotal = 800 + 6 + 4 + 10,
> +static const struct display_timing auo_g121ean01_timing = {
> +	.pixelclock = { 60000000, 74400000, 90000000 },
> +	.hactive = { 1280, 1280, 1280 },
> +	.hfront_porch = { 20, 50, 100 },
> +	.hback_porch = { 20, 50, 100 },
> +	.hsync_len = { 30, 100, 200 },
> +	.vactive = { 800, 800, 800 },
> +	.vfront_porch = { 2, 10, 25 },
> +	.vback_porch = { 2, 10, 25 },
> +	.vsync_len = { 4, 18, 50 },
>   };
>   
>   static const struct panel_desc auo_g121ean01 = {
> -	.modes = &auo_g121ean01_mode,
> -	.num_modes = 1,
> +	.timings = &auo_g121ean01_timing,
> +	.num_timings = 1,
>   	.bpc = 8,
>   	.size = {
>   		.width = 261,

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Neil Armstrong Aug. 14, 2023, 12:51 p.m. UTC | #2
Hi,

On Fri, 04 Aug 2023 17:12:39 +0200, Luca Ceresoli wrote:
> Commit 03e909acd95a ("drm/panel: simple: Add support for AUO G121EAN01.4
> panel") added support for this panel model, but the timings it implements
> are very different from what the datasheet describes. I checked both the
> G121EAN01.0 datasheet from [0] and the G121EAN01.4 one from [1] and they
> all have the same timings: for example the LVDS clock typical value is 74.4
> MHz, not 66.7 MHz as implemented.
> 
> [...]

Thanks, Applied to https://anongit.freedesktop.org/git/drm/drm-misc.git (drm-misc-fixes)

[1/1] drm/panel: simple: Fix AUO G121EAN01 panel timings according to the docs
      https://cgit.freedesktop.org/drm/drm-misc/commit/?id=e8470c0a7bcaa82f78ad34282d662dd7bd9630c2
diff mbox series

Patch

diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c
index 701013b3ad13..56854f78441e 100644
--- a/drivers/gpu/drm/panel/panel-simple.c
+++ b/drivers/gpu/drm/panel/panel-simple.c
@@ -999,21 +999,21 @@  static const struct panel_desc auo_g104sn02 = {
 	.connector_type = DRM_MODE_CONNECTOR_LVDS,
 };
 
-static const struct drm_display_mode auo_g121ean01_mode = {
-	.clock = 66700,
-	.hdisplay = 1280,
-	.hsync_start = 1280 + 58,
-	.hsync_end = 1280 + 58 + 8,
-	.htotal = 1280 + 58 + 8 + 70,
-	.vdisplay = 800,
-	.vsync_start = 800 + 6,
-	.vsync_end = 800 + 6 + 4,
-	.vtotal = 800 + 6 + 4 + 10,
+static const struct display_timing auo_g121ean01_timing = {
+	.pixelclock = { 60000000, 74400000, 90000000 },
+	.hactive = { 1280, 1280, 1280 },
+	.hfront_porch = { 20, 50, 100 },
+	.hback_porch = { 20, 50, 100 },
+	.hsync_len = { 30, 100, 200 },
+	.vactive = { 800, 800, 800 },
+	.vfront_porch = { 2, 10, 25 },
+	.vback_porch = { 2, 10, 25 },
+	.vsync_len = { 4, 18, 50 },
 };
 
 static const struct panel_desc auo_g121ean01 = {
-	.modes = &auo_g121ean01_mode,
-	.num_modes = 1,
+	.timings = &auo_g121ean01_timing,
+	.num_timings = 1,
 	.bpc = 8,
 	.size = {
 		.width = 261,