diff mbox series

[v2] ARM: dts: apq8064: add support to gsbi4 uart

Message ID 20230814150040.64133-1-david@ixit.cz (mailing list archive)
State Accepted
Headers show
Series [v2] ARM: dts: apq8064: add support to gsbi4 uart | expand

Commit Message

David Heidelberg Aug. 14, 2023, 3 p.m. UTC
This patch adds support to gsbi4 uart which is used in LG Mako.

Signed-off-by: David Heidelberg <david@ixit.cz>
---
v2:
 - incorporated Krzysztof hints: added -state to the node name,
   and -pins to the sub-nodes

 arch/arm/boot/dts/qcom/qcom-apq8064-pins.dtsi | 16 ++++++++++++++++
 arch/arm/boot/dts/qcom/qcom-apq8064.dtsi      | 12 ++++++++++++
 2 files changed, 28 insertions(+)

Comments

Bjorn Andersson Aug. 15, 2023, 6:49 p.m. UTC | #1
On Mon, 14 Aug 2023 17:00:40 +0200, David Heidelberg wrote:
> This patch adds support to gsbi4 uart which is used in LG Mako.
> 
> 

Applied, thanks!

[1/1] ARM: dts: apq8064: add support to gsbi4 uart
      commit: f6ce0896b4ec0683abfcc86a6facdacb72e1b23c

Best regards,
diff mbox series

Patch

diff --git a/arch/arm/boot/dts/qcom/qcom-apq8064-pins.dtsi b/arch/arm/boot/dts/qcom/qcom-apq8064-pins.dtsi
index 1f15186dd710..3ece5260ee51 100644
--- a/arch/arm/boot/dts/qcom/qcom-apq8064-pins.dtsi
+++ b/arch/arm/boot/dts/qcom/qcom-apq8064-pins.dtsi
@@ -233,6 +233,22 @@  pinconf {
 		};
 	};
 
+	gsbi4_uart_pin_a: gsbi4-uart-pin-active-state {
+		rx-pins {
+			pins = "gpio11";
+			function = "gsbi4";
+			drive-strength = <2>;
+			bias-disable;
+		};
+
+		tx-pins {
+			pins = "gpio10";
+			function = "gsbi4";
+			drive-strength = <4>;
+			bias-disable;
+		};
+	};
+
 	gsbi6_uart_2pins: gsbi6_uart_2pins {
 		mux {
 			pins = "gpio14", "gpio15";
diff --git a/arch/arm/boot/dts/qcom/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom/qcom-apq8064.dtsi
index 2ab69dd69862..870205028f5c 100644
--- a/arch/arm/boot/dts/qcom/qcom-apq8064.dtsi
+++ b/arch/arm/boot/dts/qcom/qcom-apq8064.dtsi
@@ -547,6 +547,18 @@  gsbi4: gsbi@16300000 {
 			#size-cells = <1>;
 			ranges;
 
+			gsbi4_serial: serial@16340000 {
+				compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
+				reg = <0x16340000 0x100>,
+				      <0x16300000 0x3>;
+				interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
+				pinctrl-0 = <&gsbi4_uart_pin_a>;
+				pinctrl-names = "default";
+				clocks = <&gcc GSBI4_UART_CLK>, <&gcc GSBI4_H_CLK>;
+				clock-names = "core", "iface";
+				status = "disabled";
+			};
+
 			gsbi4_i2c: i2c@16380000 {
 				compatible = "qcom,i2c-qup-v1.1.1";
 				pinctrl-0 = <&i2c4_pins>;