Message ID | 20230822113451.13785-1-vadimp@nvidia.com (mailing list archive) |
---|---|
Headers | show |
Series | Add new features and amendments for Nvidia systems | expand |
On Tue, 22 Aug 2023, Vadim Pasternak wrote: > Add documentation for the new attributes: > - CPLD versioning: "cpld5_pn", "cpld5_version", "cpld5_version_min". > - JTAG capability: "jtag_cap", indicating the available method of > CPLD/FPGA devices field update. > - System lid status: "lid_open". > - Reset caused by long press of power button: "reset_long_pwr_pb". > - Reset caused by switch board DC-DC converter device failure: > "reset_swb_dc_dc_pwr_fail". > > Signed-off-by: Vadim Pasternak <vadimp@nvidia.com> > Reviewed-by: Michael Shych <michaelsh@nvidia.com> > Reviewed-by: Hans de Goede <hdegoede@redhat.com> > --- > v3->v4: > Comments provided by Ilpo: > - Modify desription for "reset_swb_dc_dc_pwr_fail". > v2->v3: > Comments provided by Hans: > - Document new attribute "reset_swb_dc_dc_pwr_fail". > --- > .../ABI/stable/sysfs-driver-mlxreg-io | 52 +++++++++++++++++++ > 1 file changed, 52 insertions(+) > > diff --git a/Documentation/ABI/stable/sysfs-driver-mlxreg-io b/Documentation/ABI/stable/sysfs-driver-mlxreg-io > index 60953903d007..115302236627 100644 > --- a/Documentation/ABI/stable/sysfs-driver-mlxreg-io > +++ b/Documentation/ABI/stable/sysfs-driver-mlxreg-io > @@ -662,3 +662,55 @@ Description: This file shows the system reset cause due to AC power failure. > Value 1 in file means this is reset cause, 0 - otherwise. > > The file is read only. > + > +What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/cpld5_pn > +What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/cpld5_version > +What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/cpld5_version_min > +Date: August 2023 > +KernelVersion: 6.6 > +Contact: Vadim Pasternak <vadimp@nvidia.com> > +Description: These files show with which CPLD part numbers, version and minor > + versions have been burned the 5-th CPLD device equipped on a > + system. > + > + The files are read only. > + > +What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/jtag_cap > +Date: August 2023 > +KernelVersion: 6.6 > +Contact: Vadim Pasternak <vadimp@nvidia.com> > +Description: This file indicates the available method of CPLD/FPGA devices > + field update through the JTAG chain: > + b00 - field update through LPC bus register memory space. > + b01 - Reserved. > + b10 - Reserved. > + b11 - field update through CPU GPIOs bit-banging. > + > + The file is read only. > + > +What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/lid_open > +Date: August 2023 > +KernelVersion: 6.6 > +Contact: Vadim Pasternak <vadimp@nvidia.com> > +Description: 1 - indicates that system lid is opened, otherwise 0. > + > + The file is read only. > + > +What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/reset_long_pwr_pb > +Date: August 2023 > +KernelVersion: 6.6 > +Contact: Vadim Pasternak <vadimp@nvidia.com> > +Description: This file if set 1 indicates that system has been reset by > + long press of power button. > + > + The file is read only. > + > +What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/reset_swb_dc_dc_pwr_fail > +Date: August 2023 > +KernelVersion: 6.6 > +Contact: Vadim Pasternak <vadimp@nvidia.com> > +Description: This file shows 1 in case the system reset happened due to the > + failure of any DC-DC power converter devices equipped on the > + switch board. > + > + The file is read only. Thanks a lot, much clearer wording now. Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
> -----Original Message----- > From: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> > Sent: Tuesday, 22 August 2023 14:44 > To: Vadim Pasternak <vadimp@nvidia.com> > Cc: hdegoede@redhat.com; platform-driver-x86@vger.kernel.org > Subject: Re: [PATCH platform-next v4 16/16] Documentation/ABI: Add new > attribute for mlxreg-io sysfs interfaces > > On Tue, 22 Aug 2023, Vadim Pasternak wrote: > > > Add documentation for the new attributes: > > - CPLD versioning: "cpld5_pn", "cpld5_version", "cpld5_version_min". > > - JTAG capability: "jtag_cap", indicating the available method of > > CPLD/FPGA devices field update. > > - System lid status: "lid_open". > > - Reset caused by long press of power button: "reset_long_pwr_pb". > > - Reset caused by switch board DC-DC converter device failure: > > "reset_swb_dc_dc_pwr_fail". > > > > Signed-off-by: Vadim Pasternak <vadimp@nvidia.com> > > Reviewed-by: Michael Shych <michaelsh@nvidia.com> > > Reviewed-by: Hans de Goede <hdegoede@redhat.com> > > --- > > v3->v4: > > Comments provided by Ilpo: > > - Modify desription for "reset_swb_dc_dc_pwr_fail". > > v2->v3: > > Comments provided by Hans: > > - Document new attribute "reset_swb_dc_dc_pwr_fail". > > --- > > .../ABI/stable/sysfs-driver-mlxreg-io | 52 +++++++++++++++++++ > > 1 file changed, 52 insertions(+) > > > > diff --git a/Documentation/ABI/stable/sysfs-driver-mlxreg-io > b/Documentation/ABI/stable/sysfs-driver-mlxreg-io > > index 60953903d007..115302236627 100644 > > --- a/Documentation/ABI/stable/sysfs-driver-mlxreg-io > > +++ b/Documentation/ABI/stable/sysfs-driver-mlxreg-io > > @@ -662,3 +662,55 @@ Description: This file shows the system reset cause > due to AC power failure. > > Value 1 in file means this is reset cause, 0 - otherwise. > > > > The file is read only. > > + > > +What: /sys/devices/platform/mlxplat/mlxreg- > io/hwmon/hwmon*/cpld5_pn > > +What: /sys/devices/platform/mlxplat/mlxreg- > io/hwmon/hwmon*/cpld5_version > > +What: /sys/devices/platform/mlxplat/mlxreg- > io/hwmon/hwmon*/cpld5_version_min > > +Date: August 2023 > > +KernelVersion: 6.6 > > +Contact: Vadim Pasternak <vadimp@nvidia.com> > > +Description: These files show with which CPLD part numbers, version and > minor > > + versions have been burned the 5-th CPLD device equipped on > a > > + system. > > + > > + The files are read only. > > + > > +What: /sys/devices/platform/mlxplat/mlxreg- > io/hwmon/hwmon*/jtag_cap > > +Date: August 2023 > > +KernelVersion: 6.6 > > +Contact: Vadim Pasternak <vadimp@nvidia.com> > > +Description: This file indicates the available method of CPLD/FPGA > devices > > + field update through the JTAG chain: > > + b00 - field update through LPC bus register memory space. > > + b01 - Reserved. > > + b10 - Reserved. > > + b11 - field update through CPU GPIOs bit-banging. > > + > > + The file is read only. > > + > > +What: /sys/devices/platform/mlxplat/mlxreg- > io/hwmon/hwmon*/lid_open > > +Date: August 2023 > > +KernelVersion: 6.6 > > +Contact: Vadim Pasternak <vadimp@nvidia.com> > > +Description: 1 - indicates that system lid is opened, otherwise 0. > > + > > + The file is read only. > > + > > +What: /sys/devices/platform/mlxplat/mlxreg- > io/hwmon/hwmon*/reset_long_pwr_pb > > +Date: August 2023 > > +KernelVersion: 6.6 > > +Contact: Vadim Pasternak <vadimp@nvidia.com> > > +Description: This file if set 1 indicates that system has been reset by > > + long press of power button. > > + > > + The file is read only. > > + > > +What: /sys/devices/platform/mlxplat/mlxreg- > io/hwmon/hwmon*/reset_swb_dc_dc_pwr_fail > > +Date: August 2023 > > +KernelVersion: 6.6 > > +Contact: Vadim Pasternak <vadimp@nvidia.com> > > +Description: This file shows 1 in case the system reset happened due to > the > > + failure of any DC-DC power converter devices equipped on > the > > + switch board. > > + > > + The file is read only. > > Thanks a lot, much clearer wording now. > > Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Thank you very much Ilpo for all your reviews! > > -- > i.
Hi, On 8/22/23 13:43, Ilpo Järvinen wrote: > On Tue, 22 Aug 2023, Vadim Pasternak wrote: > >> Add documentation for the new attributes: >> - CPLD versioning: "cpld5_pn", "cpld5_version", "cpld5_version_min". >> - JTAG capability: "jtag_cap", indicating the available method of >> CPLD/FPGA devices field update. >> - System lid status: "lid_open". >> - Reset caused by long press of power button: "reset_long_pwr_pb". >> - Reset caused by switch board DC-DC converter device failure: >> "reset_swb_dc_dc_pwr_fail". >> >> Signed-off-by: Vadim Pasternak <vadimp@nvidia.com> >> Reviewed-by: Michael Shych <michaelsh@nvidia.com> >> Reviewed-by: Hans de Goede <hdegoede@redhat.com> >> --- >> v3->v4: >> Comments provided by Ilpo: >> - Modify desription for "reset_swb_dc_dc_pwr_fail". Thank you for your patch-series, I've applied the series to my review-hans branch: https://git.kernel.org/pub/scm/linux/kernel/git/pdx86/platform-drivers-x86.git/log/?h=review-hans Note it will show up in my review-hans branch once I've pushed my local branch there, which might take a while. Once I've run some tests on this branch the patches there will be added to the platform-drivers-x86/for-next branch and eventually will be included in the pdx86 pull-request to Linus for the next merge-window. Regards, Hans >> v2->v3: >> Comments provided by Hans: >> - Document new attribute "reset_swb_dc_dc_pwr_fail". >> --- >> .../ABI/stable/sysfs-driver-mlxreg-io | 52 +++++++++++++++++++ >> 1 file changed, 52 insertions(+) >> >> diff --git a/Documentation/ABI/stable/sysfs-driver-mlxreg-io b/Documentation/ABI/stable/sysfs-driver-mlxreg-io >> index 60953903d007..115302236627 100644 >> --- a/Documentation/ABI/stable/sysfs-driver-mlxreg-io >> +++ b/Documentation/ABI/stable/sysfs-driver-mlxreg-io >> @@ -662,3 +662,55 @@ Description: This file shows the system reset cause due to AC power failure. >> Value 1 in file means this is reset cause, 0 - otherwise. >> >> The file is read only. >> + >> +What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/cpld5_pn >> +What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/cpld5_version >> +What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/cpld5_version_min >> +Date: August 2023 >> +KernelVersion: 6.6 >> +Contact: Vadim Pasternak <vadimp@nvidia.com> >> +Description: These files show with which CPLD part numbers, version and minor >> + versions have been burned the 5-th CPLD device equipped on a >> + system. >> + >> + The files are read only. >> + >> +What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/jtag_cap >> +Date: August 2023 >> +KernelVersion: 6.6 >> +Contact: Vadim Pasternak <vadimp@nvidia.com> >> +Description: This file indicates the available method of CPLD/FPGA devices >> + field update through the JTAG chain: >> + b00 - field update through LPC bus register memory space. >> + b01 - Reserved. >> + b10 - Reserved. >> + b11 - field update through CPU GPIOs bit-banging. >> + >> + The file is read only. >> + >> +What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/lid_open >> +Date: August 2023 >> +KernelVersion: 6.6 >> +Contact: Vadim Pasternak <vadimp@nvidia.com> >> +Description: 1 - indicates that system lid is opened, otherwise 0. >> + >> + The file is read only. >> + >> +What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/reset_long_pwr_pb >> +Date: August 2023 >> +KernelVersion: 6.6 >> +Contact: Vadim Pasternak <vadimp@nvidia.com> >> +Description: This file if set 1 indicates that system has been reset by >> + long press of power button. >> + >> + The file is read only. >> + >> +What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/reset_swb_dc_dc_pwr_fail >> +Date: August 2023 >> +KernelVersion: 6.6 >> +Contact: Vadim Pasternak <vadimp@nvidia.com> >> +Description: This file shows 1 in case the system reset happened due to the >> + failure of any DC-DC power converter devices equipped on the >> + switch board. >> + >> + The file is read only. > > Thanks a lot, much clearer wording now. > > Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> >
Hi, On 8/22/23 17:51, Hans de Goede wrote: > Hi, > > On 8/22/23 13:43, Ilpo Järvinen wrote: >> On Tue, 22 Aug 2023, Vadim Pasternak wrote: >> >>> Add documentation for the new attributes: >>> - CPLD versioning: "cpld5_pn", "cpld5_version", "cpld5_version_min". >>> - JTAG capability: "jtag_cap", indicating the available method of >>> CPLD/FPGA devices field update. >>> - System lid status: "lid_open". >>> - Reset caused by long press of power button: "reset_long_pwr_pb". >>> - Reset caused by switch board DC-DC converter device failure: >>> "reset_swb_dc_dc_pwr_fail". >>> >>> Signed-off-by: Vadim Pasternak <vadimp@nvidia.com> >>> Reviewed-by: Michael Shych <michaelsh@nvidia.com> >>> Reviewed-by: Hans de Goede <hdegoede@redhat.com> >>> --- >>> v3->v4: >>> Comments provided by Ilpo: >>> - Modify desription for "reset_swb_dc_dc_pwr_fail". > > Thank you for your patch-series, I've applied the series to my > review-hans branch: > https://git.kernel.org/pub/scm/linux/kernel/git/pdx86/platform-drivers-x86.git/log/?h=review-hans > > Note it will show up in my review-hans branch once I've pushed my > local branch there, which might take a while. > > Once I've run some tests on this branch the patches there will be > added to the platform-drivers-x86/for-next branch and eventually > will be included in the pdx86 pull-request to Linus for the next > merge-window. Quick follow up I've squashed in a few whitespace changes into this (16/16) patch to fix a new "make htmldocs" warning: /home/hans/projects/platform-drivers-x86/Documentation/ABI/stable/sysfs-driver-mlxreg-io:679: ERROR: Unexpected indentation. Regards, Hans > > Regards, > > Hans > > >>> v2->v3: >>> Comments provided by Hans: >>> - Document new attribute "reset_swb_dc_dc_pwr_fail". >>> --- >>> .../ABI/stable/sysfs-driver-mlxreg-io | 52 +++++++++++++++++++ >>> 1 file changed, 52 insertions(+) >>> >>> diff --git a/Documentation/ABI/stable/sysfs-driver-mlxreg-io b/Documentation/ABI/stable/sysfs-driver-mlxreg-io >>> index 60953903d007..115302236627 100644 >>> --- a/Documentation/ABI/stable/sysfs-driver-mlxreg-io >>> +++ b/Documentation/ABI/stable/sysfs-driver-mlxreg-io >>> @@ -662,3 +662,55 @@ Description: This file shows the system reset cause due to AC power failure. >>> Value 1 in file means this is reset cause, 0 - otherwise. >>> >>> The file is read only. >>> + >>> +What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/cpld5_pn >>> +What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/cpld5_version >>> +What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/cpld5_version_min >>> +Date: August 2023 >>> +KernelVersion: 6.6 >>> +Contact: Vadim Pasternak <vadimp@nvidia.com> >>> +Description: These files show with which CPLD part numbers, version and minor >>> + versions have been burned the 5-th CPLD device equipped on a >>> + system. >>> + >>> + The files are read only. >>> + >>> +What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/jtag_cap >>> +Date: August 2023 >>> +KernelVersion: 6.6 >>> +Contact: Vadim Pasternak <vadimp@nvidia.com> >>> +Description: This file indicates the available method of CPLD/FPGA devices >>> + field update through the JTAG chain: >>> + b00 - field update through LPC bus register memory space. >>> + b01 - Reserved. >>> + b10 - Reserved. >>> + b11 - field update through CPU GPIOs bit-banging. >>> + >>> + The file is read only. >>> + >>> +What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/lid_open >>> +Date: August 2023 >>> +KernelVersion: 6.6 >>> +Contact: Vadim Pasternak <vadimp@nvidia.com> >>> +Description: 1 - indicates that system lid is opened, otherwise 0. >>> + >>> + The file is read only. >>> + >>> +What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/reset_long_pwr_pb >>> +Date: August 2023 >>> +KernelVersion: 6.6 >>> +Contact: Vadim Pasternak <vadimp@nvidia.com> >>> +Description: This file if set 1 indicates that system has been reset by >>> + long press of power button. >>> + >>> + The file is read only. >>> + >>> +What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/reset_swb_dc_dc_pwr_fail >>> +Date: August 2023 >>> +KernelVersion: 6.6 >>> +Contact: Vadim Pasternak <vadimp@nvidia.com> >>> +Description: This file shows 1 in case the system reset happened due to the >>> + failure of any DC-DC power converter devices equipped on the >>> + switch board. >>> + >>> + The file is read only. >> >> Thanks a lot, much clearer wording now. >> >> Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> >>