| Message ID | 20230816101120.885812-1-abel.vesa@linaro.org (mailing list archive) |
|---|---|
| State | Accepted, archived |
| Headers | show |
| Series | [GIT,PULL] clk: imx: Updates for v6.6 | expand |
Quoting Abel Vesa (2023-08-16 03:11:20) > The following changes since commit 06c2afb862f9da8dc5efa4b6076a0e48c3fbaaa5: > > Linux 6.5-rc1 (2023-07-09 13:53:13 -0700) > > are available in the Git repository at: > > git://git.kernel.org/pub/scm/linux/kernel/git/abelvesa/linux.git/ tags/clk-imx-6.6 > > for you to fetch changes up to 72d00e560d10665e6139c9431956a87ded6e9880: > > clk: imx: pll14xx: dynamically configure PLL for 393216000/361267200Hz (2023-08-14 12:52:32 +0300) > > ---------------------------------------------------------------- Thanks. Pulled into clk-next
The following changes since commit 06c2afb862f9da8dc5efa4b6076a0e48c3fbaaa5: Linux 6.5-rc1 (2023-07-09 13:53:13 -0700) are available in the Git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/abelvesa/linux.git/ tags/clk-imx-6.6 for you to fetch changes up to 72d00e560d10665e6139c9431956a87ded6e9880: clk: imx: pll14xx: dynamically configure PLL for 393216000/361267200Hz (2023-08-14 12:52:32 +0300) ---------------------------------------------------------------- i.MX clocks changes for 6.6 - Add the PDM IPC clock for i.MX93 - Add 519.75MHz frequency support for i.MX9 PLL - Simplify the .determine_rate() for GPR mux - Make the i.MX8QXP LPCG clock use devm_platform_ioremap_resource - Add the audio mux clock to i.MX8 - Fix the SPLL2 MULT range for PLLv4 - Update the SPLL2 type in i.MX8ULP - Fix the SAI4 clock on i.MX8MP - Add silicon revision print for i.MX25 on clocks init - Drop the return value from __mx25_clocks_init - Fix the clock pauses on no-op set_rate for i.MX8M composite clock - Drop restrictions for PLL14xx and fix its max prediv value - Drop the 393216000 and 361267200 from PLL14xx rate table to allow glitch free switching ---------------------------------------------------------------- Ahmad Fatoum (2): clk: imx: composite-8m: fix clock pauses when set_rate would be a no-op clk: imx: pll14xx: dynamically configure PLL for 393216000/361267200Hz Chancel Liu (2): dt-bindings: clock: imx93: Add PDM IPG clk clk: imx93: Add PDM IPG clk Christophe JAILLET (1): clk: imx: clk-gpr-mux: Simplify .determine_rate() Jacky Bai (1): clk: imx: Add 519.75MHz frequency support for imx9 pll Marco Felsch (3): clk: imx8mp: fix sai4 clock dt-bindings: clocks: imx8mp: make sai4 a dummy clock clk: imx: pll14xx: align pdiv with reference manual Martin Kaiser (2): clk: imx25: print silicon revision during init clk: imx25: make __mx25_clocks_init return void Peng Fan (1): clk: imx: imx8ulp: update SPLL2 type Shengjiu Wang (2): dt-bindings: clock: fsl,imx8-acm: Add audio clock mux support clk: imx: imx8: add audio clock mux driver Yangtao Li (1): clk: imx: clk-imx8qxp-lpcg: Convert to devm_platform_ioremap_resource() Ye Li (1): clk: imx: pllv4: Fix SPLL2 MULT range .../devicetree/bindings/clock/fsl,imx8-acm.yaml | 282 ++++++++++++ drivers/clk/imx/Makefile | 3 +- drivers/clk/imx/clk-composite-8m.c | 12 +- drivers/clk/imx/clk-fracn-gppll.c | 1 + drivers/clk/imx/clk-gpr-mux.c | 8 +- drivers/clk/imx/clk-imx25.c | 5 +- drivers/clk/imx/clk-imx8-acm.c | 476 +++++++++++++++++++++ drivers/clk/imx/clk-imx8mp.c | 5 - drivers/clk/imx/clk-imx8qxp-lpcg.c | 4 +- drivers/clk/imx/clk-imx8ulp.c | 2 +- drivers/clk/imx/clk-imx93.c | 4 +- drivers/clk/imx/clk-pll14xx.c | 13 +- drivers/clk/imx/clk-pllv4.c | 46 +- drivers/clk/imx/clk.h | 1 + include/dt-bindings/clock/imx8-clock.h | 28 ++ include/dt-bindings/clock/imx8mp-clock.h | 2 +- include/dt-bindings/clock/imx93-clock.h | 3 +- include/soc/imx/revision.h | 1 + 18 files changed, 851 insertions(+), 45 deletions(-) create mode 100644 Documentation/devicetree/bindings/clock/fsl,imx8-acm.yaml create mode 100644 drivers/clk/imx/clk-imx8-acm.c