Message ID | 20230823055821.460045-5-suraj.kandpal@intel.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | HDCP MST aux issue fix | expand |
> -----Original Message----- > From: Kandpal, Suraj <suraj.kandpal@intel.com> > Sent: Wednesday, August 23, 2023 11:28 AM > To: intel-gfx@lists.freedesktop.org > Cc: Nautiyal, Ankit K <ankit.k.nautiyal@intel.com>; uma.shakar@intel.com; > Murthy, Arun R <arun.r.murthy@intel.com>; Kandpal, Suraj > <suraj.kandpal@intel.com> > Subject: [PATCH v2 4/4] drm/i915/hdcp: Adjust timeout for read in DPMST > Scenario > > For dpmst hdcp scenario increase the message timeout based on the number of > ports connected as each port needs to be validated and each will take the > prescribed amount of time for the respective msg_id and total timeout will be > original_timeout * num_ports. > > --v2 > -Add justification for Adjusting the timeout [Arun] > > Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com> > --- Reviewed-by: Arun R Murthy <arun.r.murthy@intel.com> Thanks and Regards, Arun R Murthy -------------------- > drivers/gpu/drm/i915/display/intel_dp_hdcp.c | 12 +++++++++--- > 1 file changed, 9 insertions(+), 3 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c > b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c > index df68fd8f2eed..b0cfe759d3e5 100644 > --- a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c > +++ b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c > @@ -560,9 +560,15 @@ int intel_dp_hdcp2_read_msg(struct intel_connector > *connector, > DP_AUX_MAX_PAYLOAD_BYTES : bytes_to_recv; > > /* Entire msg read timeout since initiate of msg read */ > - if (bytes_to_recv == size - 1 && hdcp2_msg_data- > >msg_read_timeout > 0) > - msg_end = ktime_add_ms(ktime_get_raw(), > - hdcp2_msg_data- > >msg_read_timeout); > + if (bytes_to_recv == size - 1 && hdcp2_msg_data- > >msg_read_timeout > 0) { > + if (intel_encoder_is_mst(connector->encoder)) > + msg_end = ktime_add_ms(ktime_get_raw(), > + hdcp2_msg_data- > >msg_read_timeout * > + connector->port->parent- > >num_ports); > + else > + msg_end = ktime_add_ms(ktime_get_raw(), > + hdcp2_msg_data- > >msg_read_timeout); > + } > > ret = drm_dp_dpcd_read(aux, offset, > (void *)byte, len); > -- > 2.25.1
diff --git a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c index df68fd8f2eed..b0cfe759d3e5 100644 --- a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c +++ b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c @@ -560,9 +560,15 @@ int intel_dp_hdcp2_read_msg(struct intel_connector *connector, DP_AUX_MAX_PAYLOAD_BYTES : bytes_to_recv; /* Entire msg read timeout since initiate of msg read */ - if (bytes_to_recv == size - 1 && hdcp2_msg_data->msg_read_timeout > 0) - msg_end = ktime_add_ms(ktime_get_raw(), - hdcp2_msg_data->msg_read_timeout); + if (bytes_to_recv == size - 1 && hdcp2_msg_data->msg_read_timeout > 0) { + if (intel_encoder_is_mst(connector->encoder)) + msg_end = ktime_add_ms(ktime_get_raw(), + hdcp2_msg_data->msg_read_timeout * + connector->port->parent->num_ports); + else + msg_end = ktime_add_ms(ktime_get_raw(), + hdcp2_msg_data->msg_read_timeout); + } ret = drm_dp_dpcd_read(aux, offset, (void *)byte, len);
For dpmst hdcp scenario increase the message timeout based on the number of ports connected as each port needs to be validated and each will take the prescribed amount of time for the respective msg_id and total timeout will be original_timeout * num_ports. --v2 -Add justification for Adjusting the timeout [Arun] Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com> --- drivers/gpu/drm/i915/display/intel_dp_hdcp.c | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-)