| Message ID | 20230827132525.951475-15-dmitry.baryshkov@linaro.org (mailing list archive) |
|---|---|
| State | Handled Elsewhere |
| Headers | show |
| Series | ARM: dts: qcom: cleanup PMIC usage | expand |
On 27.08.2023 15:25, Dmitry Baryshkov wrote: > The interrupt of SSBI PMICs is routed to the SoCs GPIO. As such, it is > not a property of the SoC, it is a property of the particular board > (even if it is standard and unified between all devices). Move these > interrupt specifications to the board files. > > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> > --- Acked-by: Konrad Dybcio <konrad.dybcio@linaro.org> Konrad
diff --git a/arch/arm/boot/dts/qcom/qcom-mdm9615-wp8548.dtsi b/arch/arm/boot/dts/qcom/qcom-mdm9615-wp8548.dtsi index dac3aa793f71..b782ff0d16cd 100644 --- a/arch/arm/boot/dts/qcom/qcom-mdm9615-wp8548.dtsi +++ b/arch/arm/boot/dts/qcom/qcom-mdm9615-wp8548.dtsi @@ -76,6 +76,10 @@ reset-out-pins { }; }; +&pm8018 { + interrupts-extended = <&intc GIC_PPI 226 IRQ_TYPE_LEVEL_HIGH>; +}; + &pm8018_gpio { usb_vbus_5v_pins: usb-vbus-5v-state { pins = "gpio4"; diff --git a/arch/arm/boot/dts/qcom/qcom-mdm9615.dtsi b/arch/arm/boot/dts/qcom/qcom-mdm9615.dtsi index c4cfbdbcdf14..373d9425b8bd 100644 --- a/arch/arm/boot/dts/qcom/qcom-mdm9615.dtsi +++ b/arch/arm/boot/dts/qcom/qcom-mdm9615.dtsi @@ -265,7 +265,6 @@ qcom,ssbi@500000 { pm8018: pmic { compatible = "qcom,pm8018", "qcom,pm8921"; - interrupts = <GIC_PPI 226 IRQ_TYPE_LEVEL_HIGH>; #interrupt-cells = <2>; interrupt-controller; #address-cells = <1>;
The interrupt of SSBI PMICs is routed to the SoCs GPIO. As such, it is not a property of the SoC, it is a property of the particular board (even if it is standard and unified between all devices). Move these interrupt specifications to the board files. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> --- arch/arm/boot/dts/qcom/qcom-mdm9615-wp8548.dtsi | 4 ++++ arch/arm/boot/dts/qcom/qcom-mdm9615.dtsi | 1 - 2 files changed, 4 insertions(+), 1 deletion(-)