| Message ID | 20230824125121.840298-2-ankit.k.nautiyal@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | eDP DSC fixes | expand |
On Thu, 24 Aug 2023, Ankit Nautiyal <ankit.k.nautiyal@intel.com> wrote: > As per DP v1.4, a DP DSC Sink device shall support 8bpc in DPCD 6Ah. > Apparently some panels that do support DSC, are not setting the bit for > 8bpc. > > So always assume 8bpc support by DSC decoder, when DSC is claimed to be > supported. Maarten, Maxime, Thomas, ack for merging this via drm-intel? BR, Jani. > > v2: Use helper to get check dsc support. (Ankit) > v3: Fix styling and other typos. (Jani) > > Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> > --- > drivers/gpu/drm/display/drm_dp_helper.c | 8 ++++++-- > 1 file changed, 6 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/display/drm_dp_helper.c b/drivers/gpu/drm/display/drm_dp_helper.c > index e6a78fd32380..8a1b64c57dfd 100644 > --- a/drivers/gpu/drm/display/drm_dp_helper.c > +++ b/drivers/gpu/drm/display/drm_dp_helper.c > @@ -2449,12 +2449,16 @@ int drm_dp_dsc_sink_supported_input_bpcs(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_S > int num_bpc = 0; > u8 color_depth = dsc_dpcd[DP_DSC_DEC_COLOR_DEPTH_CAP - DP_DSC_SUPPORT]; > > + if (!drm_dp_sink_supports_dsc(dsc_dpcd)) > + return 0; > + > if (color_depth & DP_DSC_12_BPC) > dsc_bpc[num_bpc++] = 12; > if (color_depth & DP_DSC_10_BPC) > dsc_bpc[num_bpc++] = 10; > - if (color_depth & DP_DSC_8_BPC) > - dsc_bpc[num_bpc++] = 8; > + > + /* A DP DSC Sink device shall support 8 bpc. */ > + dsc_bpc[num_bpc++] = 8; > > return num_bpc; > }
On Tue, Aug 29, 2023 at 11:44:10AM +0300, Jani Nikula wrote: > On Thu, 24 Aug 2023, Ankit Nautiyal <ankit.k.nautiyal@intel.com> wrote: > > As per DP v1.4, a DP DSC Sink device shall support 8bpc in DPCD 6Ah. > > Apparently some panels that do support DSC, are not setting the bit for > > 8bpc. > > > > So always assume 8bpc support by DSC decoder, when DSC is claimed to be > > supported. > > Maarten, Maxime, Thomas, ack for merging this via drm-intel? That's fine by me Maxime
On Thu, Aug 24, 2023 at 06:21:20PM +0530, Ankit Nautiyal wrote: > As per DP v1.4, a DP DSC Sink device shall support 8bpc in DPCD 6Ah. > Apparently some panels that do support DSC, are not setting the bit for > 8bpc. > > So always assume 8bpc support by DSC decoder, when DSC is claimed to be > supported. > > v2: Use helper to get check dsc support. (Ankit) > v3: Fix styling and other typos. (Jani) > > Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> > --- > drivers/gpu/drm/display/drm_dp_helper.c | 8 ++++++-- > 1 file changed, 6 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/display/drm_dp_helper.c b/drivers/gpu/drm/display/drm_dp_helper.c > index e6a78fd32380..8a1b64c57dfd 100644 > --- a/drivers/gpu/drm/display/drm_dp_helper.c > +++ b/drivers/gpu/drm/display/drm_dp_helper.c > @@ -2449,12 +2449,16 @@ int drm_dp_dsc_sink_supported_input_bpcs(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_S > int num_bpc = 0; > u8 color_depth = dsc_dpcd[DP_DSC_DEC_COLOR_DEPTH_CAP - DP_DSC_SUPPORT]; > > + if (!drm_dp_sink_supports_dsc(dsc_dpcd)) > + return 0; > + > if (color_depth & DP_DSC_12_BPC) > dsc_bpc[num_bpc++] = 12; > if (color_depth & DP_DSC_10_BPC) > dsc_bpc[num_bpc++] = 10; > - if (color_depth & DP_DSC_8_BPC) > - dsc_bpc[num_bpc++] = 8; > + > + /* A DP DSC Sink device shall support 8 bpc. */ > + dsc_bpc[num_bpc++] = 8; > > return num_bpc; > }
On Wed, 30 Aug 2023, "Lisovskiy, Stanislav" <stanislav.lisovskiy@intel.com> wrote: > On Thu, Aug 24, 2023 at 06:21:20PM +0530, Ankit Nautiyal wrote: >> As per DP v1.4, a DP DSC Sink device shall support 8bpc in DPCD 6Ah. >> Apparently some panels that do support DSC, are not setting the bit for >> 8bpc. >> >> So always assume 8bpc support by DSC decoder, when DSC is claimed to be >> supported. >> >> v2: Use helper to get check dsc support. (Ankit) >> v3: Fix styling and other typos. (Jani) >> >> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> > > Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> Pushed both to drm-intel-next, with Maxime's ack, thanks for the patches and review. BR, Jani. > >> --- >> drivers/gpu/drm/display/drm_dp_helper.c | 8 ++++++-- >> 1 file changed, 6 insertions(+), 2 deletions(-) >> >> diff --git a/drivers/gpu/drm/display/drm_dp_helper.c b/drivers/gpu/drm/display/drm_dp_helper.c >> index e6a78fd32380..8a1b64c57dfd 100644 >> --- a/drivers/gpu/drm/display/drm_dp_helper.c >> +++ b/drivers/gpu/drm/display/drm_dp_helper.c >> @@ -2449,12 +2449,16 @@ int drm_dp_dsc_sink_supported_input_bpcs(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_S >> int num_bpc = 0; >> u8 color_depth = dsc_dpcd[DP_DSC_DEC_COLOR_DEPTH_CAP - DP_DSC_SUPPORT]; >> >> + if (!drm_dp_sink_supports_dsc(dsc_dpcd)) >> + return 0; >> + >> if (color_depth & DP_DSC_12_BPC) >> dsc_bpc[num_bpc++] = 12; >> if (color_depth & DP_DSC_10_BPC) >> dsc_bpc[num_bpc++] = 10; >> - if (color_depth & DP_DSC_8_BPC) >> - dsc_bpc[num_bpc++] = 8; >> + >> + /* A DP DSC Sink device shall support 8 bpc. */ >> + dsc_bpc[num_bpc++] = 8; >> >> return num_bpc; >> }
diff --git a/drivers/gpu/drm/display/drm_dp_helper.c b/drivers/gpu/drm/display/drm_dp_helper.c index e6a78fd32380..8a1b64c57dfd 100644 --- a/drivers/gpu/drm/display/drm_dp_helper.c +++ b/drivers/gpu/drm/display/drm_dp_helper.c @@ -2449,12 +2449,16 @@ int drm_dp_dsc_sink_supported_input_bpcs(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_S int num_bpc = 0; u8 color_depth = dsc_dpcd[DP_DSC_DEC_COLOR_DEPTH_CAP - DP_DSC_SUPPORT]; + if (!drm_dp_sink_supports_dsc(dsc_dpcd)) + return 0; + if (color_depth & DP_DSC_12_BPC) dsc_bpc[num_bpc++] = 12; if (color_depth & DP_DSC_10_BPC) dsc_bpc[num_bpc++] = 10; - if (color_depth & DP_DSC_8_BPC) - dsc_bpc[num_bpc++] = 8; + + /* A DP DSC Sink device shall support 8 bpc. */ + dsc_bpc[num_bpc++] = 8; return num_bpc; }
As per DP v1.4, a DP DSC Sink device shall support 8bpc in DPCD 6Ah. Apparently some panels that do support DSC, are not setting the bit for 8bpc. So always assume 8bpc support by DSC decoder, when DSC is claimed to be supported. v2: Use helper to get check dsc support. (Ankit) v3: Fix styling and other typos. (Jani) Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> --- drivers/gpu/drm/display/drm_dp_helper.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-)